uart_rx.v File Reference

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Functions
module	uart_rx (parameter DATA_WIDTH=8)(input wire clk
	always (posedge clk)

Variables
module input wire	rst
module input wire output wire< DATA_WIDTH-1:0 >	m_axis_tdata = m_axis_tdata_reg
module input wire output wire< DATA_WIDTH-1:0 > output wire	m_axis_tvalid = m_axis_tvalid_reg
module input wire output wire< DATA_WIDTH-1:0 > output wire input wire	m_axis_tready
module input wire output wire< DATA_WIDTH-1:0 > output wire input wire input wire	rxd
module input wire output wire< DATA_WIDTH-1:0 > output wire input wire input wire output wire	busy = busy_reg
module input wire output wire< DATA_WIDTH-1:0 > output wire input wire input wire output wire output wire	overrun_error = overrun_error_reg
module input wire output wire< DATA_WIDTH-1:0 > output wire input wire input wire output wire output wire output wire	frame_error = frame_error_reg
module input wire output wire< DATA_WIDTH-1:0 > output wire input wire input wire output wire output wire output wire input wire< 15:0 >	prescale
reg	m_axis_tvalid_reg = 0
reg	rxd_reg = 1
reg	busy_reg = 0
reg	overrun_error_reg = 0
reg	frame_error_reg = 0
reg< DATA_WIDTH-1:0 >	data_reg = 0
reg< 18:0 >	prescale_reg = 0
reg< 3:0 >	bit_cnt = 0

Function Documentation

always()

always

(

posedge

clk

)

Definition at line 86 of file uart_rx.v.

References bit_cnt, busy_reg, data_reg, frame_error_reg, m_axis_tready, m_axis_tvalid, m_axis_tvalid_reg, overrun_error_reg, prescale, prescale_reg, rst, rxd, and rxd_reg.

Referenced by char_buffer(), char_rom(), clock_generator(), clock_pll48(), command_handler(), cursor_blinker(), falling_edge_detector(), keyboard(), keymap_rom(), rising_edge_detector(), simple_register(), usb_fs_in_arb(), usb_fs_in_pe(), usb_fs_out_arb(), usb_fs_out_pe(), usb_fs_rx(), usb_fs_tx(), usb_reset_det(), usb_serial_ctrl_ep(), usb_uart(), usb_uart_bridge_ep(), video_generator(), and width_adapter().

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Variable Documentation

bit_cnt

reg<3:0> bit_cnt = 0

Definition at line 77 of file uart_rx.v.

Referenced by always().

busy

assign busy = busy_reg

Definition at line 55 of file uart_rx.v.

busy_reg

reg busy_reg = 0

Definition at line 71 of file uart_rx.v.

Referenced by always().

data_reg

reg<DATA_WIDTH-1:0> data_reg = 0

Definition at line 75 of file uart_rx.v.

Referenced by always().

frame_error

assign frame_error = frame_error_reg

Definition at line 57 of file uart_rx.v.

frame_error_reg

reg frame_error_reg = 0

Definition at line 73 of file uart_rx.v.

Referenced by always().

m_axis_tdata

assign m_axis_tdata = m_axis_tdata_reg

Definition at line 43 of file uart_rx.v.

m_axis_tready

module input wire output wire<DATA_WIDTH-1:0> output wire input wire m_axis_tready

Definition at line 45 of file uart_rx.v.

Referenced by always().

m_axis_tvalid

assign m_axis_tvalid = m_axis_tvalid_reg

Definition at line 44 of file uart_rx.v.

Referenced by always().

m_axis_tvalid_reg

reg m_axis_tvalid_reg = 0

Definition at line 67 of file uart_rx.v.

Referenced by always().

overrun_error

assign overrun_error = overrun_error_reg

Definition at line 56 of file uart_rx.v.

overrun_error_reg

reg overrun_error_reg = 0

Definition at line 72 of file uart_rx.v.

Referenced by always().

prescale

module input wire output wire<DATA_WIDTH-1:0> output wire input wire input wire output wire output wire output wire input wire<15:0> prescale

Initial value:

{
 
reg <DATA_WIDTH-1:0>  m_axis_tdata_reg = 0

Definition at line 62 of file uart_rx.v.

Referenced by always().

prescale_reg

reg<18:0> prescale_reg = 0

Definition at line 76 of file uart_rx.v.

Referenced by always().

rst

module input wire rst

Definition at line 38 of file uart_rx.v.

Referenced by always().

rxd

module input wire output wire<DATA_WIDTH-1:0> output wire input wire input wire rxd

Definition at line 50 of file uart_rx.v.

Referenced by always().

rxd_reg

reg rxd_reg = 1

Definition at line 69 of file uart_rx.v.

Referenced by always().