vt52-fpga  1.0.0 Initial
vt52-fpga is a serial terminal implemented on a FPGA
simple_register.v
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1 /**
2  * Basic register with synchronous set & reset
3  */
4 module simple_register
5  #(parameter SIZE = 8)
6  (input wire clk,
7  input wire reset,
8  input wire [SIZE-1:0] idata,
9  input wire wen,
10  output reg [SIZE-1:0] odata
11  );
12 
13  always @(posedge clk) begin
14  if (reset) odata <= 0;
15  else if (wen) odata = idata;
16  end
17 endmodule
simple_register
module simple_register(input wire clk, input wire reset, input wire< SIZE-1:0 > idata, input wire wen, output reg< SIZE-1:0 > odata)
Basic register with synchronous set & reset.
Definition: simple_register.v:6
always
always(posedge clk)
Definition: uart_rx.v:86