SimpleVOut  1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
design_1_xbar_0.cpp
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48 
49 
50 #include "design_1_xbar_0_sc.h"
51 
52 #include "design_1_xbar_0.h"
53 
54 #include "axi_crossbar.h"
55 
56 #include <map>
57 #include <string>
58 
59 
60 
61 
62 
63 #ifdef XILINX_SIMULATOR
64 design_1_xbar_0::design_1_xbar_0(const sc_core::sc_module_name& nm) : design_1_xbar_0_sc(nm), aclk("aclk"), aresetn("aresetn"), s_axi_awaddr("s_axi_awaddr"), s_axi_awprot("s_axi_awprot"), s_axi_awvalid("s_axi_awvalid"), s_axi_awready("s_axi_awready"), s_axi_wdata("s_axi_wdata"), s_axi_wstrb("s_axi_wstrb"), s_axi_wvalid("s_axi_wvalid"), s_axi_wready("s_axi_wready"), s_axi_bresp("s_axi_bresp"), s_axi_bvalid("s_axi_bvalid"), s_axi_bready("s_axi_bready"), s_axi_araddr("s_axi_araddr"), s_axi_arprot("s_axi_arprot"), s_axi_arvalid("s_axi_arvalid"), s_axi_arready("s_axi_arready"), s_axi_rdata("s_axi_rdata"), s_axi_rresp("s_axi_rresp"), s_axi_rvalid("s_axi_rvalid"), s_axi_rready("s_axi_rready"), m_axi_awaddr("m_axi_awaddr"), m_axi_awprot("m_axi_awprot"), m_axi_awvalid("m_axi_awvalid"), m_axi_awready("m_axi_awready"), m_axi_wdata("m_axi_wdata"), m_axi_wstrb("m_axi_wstrb"), m_axi_wvalid("m_axi_wvalid"), m_axi_wready("m_axi_wready"), m_axi_bresp("m_axi_bresp"), m_axi_bvalid("m_axi_bvalid"), m_axi_bready("m_axi_bready"), m_axi_araddr("m_axi_araddr"), m_axi_arprot("m_axi_arprot"), m_axi_arvalid("m_axi_arvalid"), m_axi_arready("m_axi_arready"), m_axi_rdata("m_axi_rdata"), m_axi_rresp("m_axi_rresp"), m_axi_rvalid("m_axi_rvalid"), m_axi_rready("m_axi_rready")
65 {
66 
67  // initialize pins
68  mp_impl->aclk(aclk);
69  mp_impl->aresetn(aresetn);
70 
71  // initialize transactors
72  mp_S00_AXI_transactor = NULL;
73  mp_s_axi_awvalid_converter = NULL;
74  mp_s_axi_awready_converter = NULL;
75  mp_s_axi_wvalid_converter = NULL;
76  mp_s_axi_wready_converter = NULL;
77  mp_s_axi_bvalid_converter = NULL;
78  mp_s_axi_bready_converter = NULL;
79  mp_s_axi_arvalid_converter = NULL;
80  mp_s_axi_arready_converter = NULL;
81  mp_s_axi_rvalid_converter = NULL;
82  mp_s_axi_rready_converter = NULL;
83  mp_M00_AXI_transactor = NULL;
84  mp_m_axi_awaddr_converter_0 = NULL;
85  mp_m_axi_awprot_converter_0 = NULL;
86  mp_m_axi_awvalid_converter_0 = NULL;
87  mp_m_axi_awready_converter_0 = NULL;
88  mp_m_axi_wdata_converter_0 = NULL;
89  mp_m_axi_wstrb_converter_0 = NULL;
90  mp_m_axi_wvalid_converter_0 = NULL;
91  mp_m_axi_wready_converter_0 = NULL;
92  mp_m_axi_bresp_converter_0 = NULL;
93  mp_m_axi_bvalid_converter_0 = NULL;
94  mp_m_axi_bready_converter_0 = NULL;
95  mp_m_axi_araddr_converter_0 = NULL;
96  mp_m_axi_arprot_converter_0 = NULL;
97  mp_m_axi_arvalid_converter_0 = NULL;
98  mp_m_axi_arready_converter_0 = NULL;
99  mp_m_axi_rdata_converter_0 = NULL;
100  mp_m_axi_rresp_converter_0 = NULL;
101  mp_m_axi_rvalid_converter_0 = NULL;
102  mp_m_axi_rready_converter_0 = NULL;
103  mp_M01_AXI_transactor = NULL;
104  mp_m_axi_awaddr_converter_1 = NULL;
105  mp_m_axi_awprot_converter_1 = NULL;
106  mp_m_axi_awvalid_converter_1 = NULL;
107  mp_m_axi_awready_converter_1 = NULL;
108  mp_m_axi_wdata_converter_1 = NULL;
109  mp_m_axi_wstrb_converter_1 = NULL;
110  mp_m_axi_wvalid_converter_1 = NULL;
111  mp_m_axi_wready_converter_1 = NULL;
112  mp_m_axi_bresp_converter_1 = NULL;
113  mp_m_axi_bvalid_converter_1 = NULL;
114  mp_m_axi_bready_converter_1 = NULL;
115  mp_m_axi_araddr_converter_1 = NULL;
116  mp_m_axi_arprot_converter_1 = NULL;
117  mp_m_axi_arvalid_converter_1 = NULL;
118  mp_m_axi_arready_converter_1 = NULL;
119  mp_m_axi_rdata_converter_1 = NULL;
120  mp_m_axi_rresp_converter_1 = NULL;
121  mp_m_axi_rvalid_converter_1 = NULL;
122  mp_m_axi_rready_converter_1 = NULL;
123  mp_M02_AXI_transactor = NULL;
124  mp_m_axi_awaddr_converter_2 = NULL;
125  mp_m_axi_awprot_converter_2 = NULL;
126  mp_m_axi_awvalid_converter_2 = NULL;
127  mp_m_axi_awready_converter_2 = NULL;
128  mp_m_axi_wdata_converter_2 = NULL;
129  mp_m_axi_wstrb_converter_2 = NULL;
130  mp_m_axi_wvalid_converter_2 = NULL;
131  mp_m_axi_wready_converter_2 = NULL;
132  mp_m_axi_bresp_converter_2 = NULL;
133  mp_m_axi_bvalid_converter_2 = NULL;
134  mp_m_axi_bready_converter_2 = NULL;
135  mp_m_axi_araddr_converter_2 = NULL;
136  mp_m_axi_arprot_converter_2 = NULL;
137  mp_m_axi_arvalid_converter_2 = NULL;
138  mp_m_axi_arready_converter_2 = NULL;
139  mp_m_axi_rdata_converter_2 = NULL;
140  mp_m_axi_rresp_converter_2 = NULL;
141  mp_m_axi_rvalid_converter_2 = NULL;
142  mp_m_axi_rready_converter_2 = NULL;
143 
144  // initialize junctures
145  mp_m_axi_concat_araddr = NULL;
146  mp_m_axi_concat_arprot = NULL;
147  mp_m_axi_concat_arvalid = NULL;
148  mp_m_axi_concat_awaddr = NULL;
149  mp_m_axi_concat_awprot = NULL;
150  mp_m_axi_concat_awvalid = NULL;
151  mp_m_axi_concat_bready = NULL;
152  mp_m_axi_concat_rready = NULL;
153  mp_m_axi_concat_wdata = NULL;
154  mp_m_axi_concat_wstrb = NULL;
155  mp_m_axi_concat_wvalid = NULL;
156  mp_m_axi_split_arready = NULL;
157  mp_m_axi_split_awready = NULL;
158  mp_m_axi_split_bresp = NULL;
159  mp_m_axi_split_bvalid = NULL;
160  mp_m_axi_split_rdata = NULL;
161  mp_m_axi_split_rresp = NULL;
162  mp_m_axi_split_rvalid = NULL;
163  mp_m_axi_split_wready = NULL;
164  mp_m_axi_concat_awaddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_awaddr");
165  mp_m_axi_concat_awaddr->in_port[0](m_axi_concat_awaddr_out_0);
166  mp_m_axi_concat_awaddr->out_port(m_axi_awaddr);
167  mp_m_axi_concat_awaddr->offset_port(0, 0);
168  mp_m_axi_concat_awprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_awprot");
169  mp_m_axi_concat_awprot->in_port[0](m_axi_concat_awprot_out_0);
170  mp_m_axi_concat_awprot->out_port(m_axi_awprot);
171  mp_m_axi_concat_awprot->offset_port(0, 0);
172  mp_m_axi_concat_awvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_awvalid");
173  mp_m_axi_concat_awvalid->in_port[0](m_axi_concat_awvalid_out_0);
174  mp_m_axi_concat_awvalid->out_port(m_axi_awvalid);
175  mp_m_axi_concat_awvalid->offset_port(0, 0);
176  mp_m_axi_split_awready = new xsc::xsc_split<3, 3>("m_axi_split_awready");
177  mp_m_axi_split_awready->in_port(m_axi_awready);
178  mp_m_axi_split_awready->out_port[0](m_axi_split_awready_out_0);
179  mp_m_axi_split_awready->add_mask(0,1,0);
180  mp_m_axi_concat_wdata = new xsc::xsc_concatenator<96, 3>("m_axi_concat_wdata");
181  mp_m_axi_concat_wdata->in_port[0](m_axi_concat_wdata_out_0);
182  mp_m_axi_concat_wdata->out_port(m_axi_wdata);
183  mp_m_axi_concat_wdata->offset_port(0, 0);
184  mp_m_axi_concat_wstrb = new xsc::xsc_concatenator<12, 3>("m_axi_concat_wstrb");
185  mp_m_axi_concat_wstrb->in_port[0](m_axi_concat_wstrb_out_0);
186  mp_m_axi_concat_wstrb->out_port(m_axi_wstrb);
187  mp_m_axi_concat_wstrb->offset_port(0, 0);
188  mp_m_axi_concat_wvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_wvalid");
189  mp_m_axi_concat_wvalid->in_port[0](m_axi_concat_wvalid_out_0);
190  mp_m_axi_concat_wvalid->out_port(m_axi_wvalid);
191  mp_m_axi_concat_wvalid->offset_port(0, 0);
192  mp_m_axi_split_wready = new xsc::xsc_split<3, 3>("m_axi_split_wready");
193  mp_m_axi_split_wready->in_port(m_axi_wready);
194  mp_m_axi_split_wready->out_port[0](m_axi_split_wready_out_0);
195  mp_m_axi_split_wready->add_mask(0,1,0);
196  mp_m_axi_split_bresp = new xsc::xsc_split<6, 3>("m_axi_split_bresp");
197  mp_m_axi_split_bresp->in_port(m_axi_bresp);
198  mp_m_axi_split_bresp->out_port[0](m_axi_split_bresp_out_0);
199  mp_m_axi_split_bresp->add_mask(0,2,0);
200  mp_m_axi_split_bvalid = new xsc::xsc_split<3, 3>("m_axi_split_bvalid");
201  mp_m_axi_split_bvalid->in_port(m_axi_bvalid);
202  mp_m_axi_split_bvalid->out_port[0](m_axi_split_bvalid_out_0);
203  mp_m_axi_split_bvalid->add_mask(0,1,0);
204  mp_m_axi_concat_bready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_bready");
205  mp_m_axi_concat_bready->in_port[0](m_axi_concat_bready_out_0);
206  mp_m_axi_concat_bready->out_port(m_axi_bready);
207  mp_m_axi_concat_bready->offset_port(0, 0);
208  mp_m_axi_concat_araddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_araddr");
209  mp_m_axi_concat_araddr->in_port[0](m_axi_concat_araddr_out_0);
210  mp_m_axi_concat_araddr->out_port(m_axi_araddr);
211  mp_m_axi_concat_araddr->offset_port(0, 0);
212  mp_m_axi_concat_arprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_arprot");
213  mp_m_axi_concat_arprot->in_port[0](m_axi_concat_arprot_out_0);
214  mp_m_axi_concat_arprot->out_port(m_axi_arprot);
215  mp_m_axi_concat_arprot->offset_port(0, 0);
216  mp_m_axi_concat_arvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_arvalid");
217  mp_m_axi_concat_arvalid->in_port[0](m_axi_concat_arvalid_out_0);
218  mp_m_axi_concat_arvalid->out_port(m_axi_arvalid);
219  mp_m_axi_concat_arvalid->offset_port(0, 0);
220  mp_m_axi_split_arready = new xsc::xsc_split<3, 3>("m_axi_split_arready");
221  mp_m_axi_split_arready->in_port(m_axi_arready);
222  mp_m_axi_split_arready->out_port[0](m_axi_split_arready_out_0);
223  mp_m_axi_split_arready->add_mask(0,1,0);
224  mp_m_axi_split_rdata = new xsc::xsc_split<96, 3>("m_axi_split_rdata");
225  mp_m_axi_split_rdata->in_port(m_axi_rdata);
226  mp_m_axi_split_rdata->out_port[0](m_axi_split_rdata_out_0);
227  mp_m_axi_split_rdata->add_mask(0,32,0);
228  mp_m_axi_split_rresp = new xsc::xsc_split<6, 3>("m_axi_split_rresp");
229  mp_m_axi_split_rresp->in_port(m_axi_rresp);
230  mp_m_axi_split_rresp->out_port[0](m_axi_split_rresp_out_0);
231  mp_m_axi_split_rresp->add_mask(0,2,0);
232  mp_m_axi_split_rvalid = new xsc::xsc_split<3, 3>("m_axi_split_rvalid");
233  mp_m_axi_split_rvalid->in_port(m_axi_rvalid);
234  mp_m_axi_split_rvalid->out_port[0](m_axi_split_rvalid_out_0);
235  mp_m_axi_split_rvalid->add_mask(0,1,0);
236  mp_m_axi_concat_rready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_rready");
237  mp_m_axi_concat_rready->in_port[0](m_axi_concat_rready_out_0);
238  mp_m_axi_concat_rready->out_port(m_axi_rready);
239  mp_m_axi_concat_rready->offset_port(0, 0);
240  mp_m_axi_concat_awaddr->in_port[1](m_axi_concat_awaddr_out_1);
241  mp_m_axi_concat_awaddr->offset_port(1, 32);
242  mp_m_axi_concat_awprot->in_port[1](m_axi_concat_awprot_out_1);
243  mp_m_axi_concat_awprot->offset_port(1, 3);
244  mp_m_axi_concat_awvalid->in_port[1](m_axi_concat_awvalid_out_1);
245  mp_m_axi_concat_awvalid->offset_port(1, 1);
246 
247  mp_m_axi_split_awready->out_port[1](m_axi_split_awready_out_1);
248  mp_m_axi_split_awready->add_mask(1,2,1);
249  mp_m_axi_concat_wdata->in_port[1](m_axi_concat_wdata_out_1);
250  mp_m_axi_concat_wdata->offset_port(1, 32);
251  mp_m_axi_concat_wstrb->in_port[1](m_axi_concat_wstrb_out_1);
252  mp_m_axi_concat_wstrb->offset_port(1, 4);
253  mp_m_axi_concat_wvalid->in_port[1](m_axi_concat_wvalid_out_1);
254  mp_m_axi_concat_wvalid->offset_port(1, 1);
255 
256  mp_m_axi_split_wready->out_port[1](m_axi_split_wready_out_1);
257  mp_m_axi_split_wready->add_mask(1,2,1);
258 
259  mp_m_axi_split_bresp->out_port[1](m_axi_split_bresp_out_1);
260  mp_m_axi_split_bresp->add_mask(1,4,2);
261 
262  mp_m_axi_split_bvalid->out_port[1](m_axi_split_bvalid_out_1);
263  mp_m_axi_split_bvalid->add_mask(1,2,1);
264  mp_m_axi_concat_bready->in_port[1](m_axi_concat_bready_out_1);
265  mp_m_axi_concat_bready->offset_port(1, 1);
266  mp_m_axi_concat_araddr->in_port[1](m_axi_concat_araddr_out_1);
267  mp_m_axi_concat_araddr->offset_port(1, 32);
268  mp_m_axi_concat_arprot->in_port[1](m_axi_concat_arprot_out_1);
269  mp_m_axi_concat_arprot->offset_port(1, 3);
270  mp_m_axi_concat_arvalid->in_port[1](m_axi_concat_arvalid_out_1);
271  mp_m_axi_concat_arvalid->offset_port(1, 1);
272 
273  mp_m_axi_split_arready->out_port[1](m_axi_split_arready_out_1);
274  mp_m_axi_split_arready->add_mask(1,2,1);
275 
276  mp_m_axi_split_rdata->out_port[1](m_axi_split_rdata_out_1);
277  mp_m_axi_split_rdata->add_mask(1,64,32);
278 
279  mp_m_axi_split_rresp->out_port[1](m_axi_split_rresp_out_1);
280  mp_m_axi_split_rresp->add_mask(1,4,2);
281 
282  mp_m_axi_split_rvalid->out_port[1](m_axi_split_rvalid_out_1);
283  mp_m_axi_split_rvalid->add_mask(1,2,1);
284  mp_m_axi_concat_rready->in_port[1](m_axi_concat_rready_out_1);
285  mp_m_axi_concat_rready->offset_port(1, 1);
286  mp_m_axi_concat_awaddr->in_port[2](m_axi_concat_awaddr_out_2);
287  mp_m_axi_concat_awaddr->offset_port(2, 64);
288  mp_m_axi_concat_awprot->in_port[2](m_axi_concat_awprot_out_2);
289  mp_m_axi_concat_awprot->offset_port(2, 6);
290  mp_m_axi_concat_awvalid->in_port[2](m_axi_concat_awvalid_out_2);
291  mp_m_axi_concat_awvalid->offset_port(2, 2);
292 
293  mp_m_axi_split_awready->out_port[2](m_axi_split_awready_out_2);
294  mp_m_axi_split_awready->add_mask(2,3,2);
295  mp_m_axi_concat_wdata->in_port[2](m_axi_concat_wdata_out_2);
296  mp_m_axi_concat_wdata->offset_port(2, 64);
297  mp_m_axi_concat_wstrb->in_port[2](m_axi_concat_wstrb_out_2);
298  mp_m_axi_concat_wstrb->offset_port(2, 8);
299  mp_m_axi_concat_wvalid->in_port[2](m_axi_concat_wvalid_out_2);
300  mp_m_axi_concat_wvalid->offset_port(2, 2);
301 
302  mp_m_axi_split_wready->out_port[2](m_axi_split_wready_out_2);
303  mp_m_axi_split_wready->add_mask(2,3,2);
304 
305  mp_m_axi_split_bresp->out_port[2](m_axi_split_bresp_out_2);
306  mp_m_axi_split_bresp->add_mask(2,6,4);
307 
308  mp_m_axi_split_bvalid->out_port[2](m_axi_split_bvalid_out_2);
309  mp_m_axi_split_bvalid->add_mask(2,3,2);
310  mp_m_axi_concat_bready->in_port[2](m_axi_concat_bready_out_2);
311  mp_m_axi_concat_bready->offset_port(2, 2);
312  mp_m_axi_concat_araddr->in_port[2](m_axi_concat_araddr_out_2);
313  mp_m_axi_concat_araddr->offset_port(2, 64);
314  mp_m_axi_concat_arprot->in_port[2](m_axi_concat_arprot_out_2);
315  mp_m_axi_concat_arprot->offset_port(2, 6);
316  mp_m_axi_concat_arvalid->in_port[2](m_axi_concat_arvalid_out_2);
317  mp_m_axi_concat_arvalid->offset_port(2, 2);
318 
319  mp_m_axi_split_arready->out_port[2](m_axi_split_arready_out_2);
320  mp_m_axi_split_arready->add_mask(2,3,2);
321 
322  mp_m_axi_split_rdata->out_port[2](m_axi_split_rdata_out_2);
323  mp_m_axi_split_rdata->add_mask(2,96,64);
324 
325  mp_m_axi_split_rresp->out_port[2](m_axi_split_rresp_out_2);
326  mp_m_axi_split_rresp->add_mask(2,6,4);
327 
328  mp_m_axi_split_rvalid->out_port[2](m_axi_split_rvalid_out_2);
329  mp_m_axi_split_rvalid->add_mask(2,3,2);
330  mp_m_axi_concat_rready->in_port[2](m_axi_concat_rready_out_2);
331  mp_m_axi_concat_rready->offset_port(2, 2);
332 
333  // initialize socket stubs
334 
335 }
336 
337 void design_1_xbar_0::before_end_of_elaboration()
338 {
339  // configure 'S00_AXI' transactor
340 
341  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "S00_AXI_TLM_MODE") != 1)
342  {
343  // Instantiate Socket Stubs
344 
345  // 'S00_AXI' transactor parameters
346  xsc::common_cpp::properties S00_AXI_transactor_param_props;
347  S00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
348  S00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
349  S00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
350  S00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
351  S00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
352  S00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
353  S00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
354  S00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
355  S00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
356  S00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
357  S00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
358  S00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
359  S00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
360  S00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
361  S00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
362  S00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
363  S00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
364  S00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
365  S00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
366  S00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "8");
367  S00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "8");
368  S00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
369  S00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "4");
370  S00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "4");
371  S00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
372  S00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
373  S00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
374  S00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
375  S00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
376  S00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
377  S00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
378  S00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
379 
380  mp_S00_AXI_transactor = new xtlm::xaximm_pin2xtlm_t<32,32,1,1,1,1,1,1>("S00_AXI_transactor", S00_AXI_transactor_param_props);
381 
382  // S00_AXI' transactor ports
383 
384  mp_S00_AXI_transactor->AWADDR(s_axi_awaddr);
385  mp_S00_AXI_transactor->AWPROT(s_axi_awprot);
386  mp_s_axi_awvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_awvalid_converter");
387  mp_s_axi_awvalid_converter->vector_in(s_axi_awvalid);
388  mp_s_axi_awvalid_converter->scalar_out(m_s_axi_awvalid_converter_signal);
389  mp_S00_AXI_transactor->AWVALID(m_s_axi_awvalid_converter_signal);
390  mp_s_axi_awready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_awready_converter");
391  mp_s_axi_awready_converter->scalar_in(m_s_axi_awready_converter_signal);
392  mp_s_axi_awready_converter->vector_out(s_axi_awready);
393  mp_S00_AXI_transactor->AWREADY(m_s_axi_awready_converter_signal);
394  mp_S00_AXI_transactor->WDATA(s_axi_wdata);
395  mp_S00_AXI_transactor->WSTRB(s_axi_wstrb);
396  mp_s_axi_wvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_wvalid_converter");
397  mp_s_axi_wvalid_converter->vector_in(s_axi_wvalid);
398  mp_s_axi_wvalid_converter->scalar_out(m_s_axi_wvalid_converter_signal);
399  mp_S00_AXI_transactor->WVALID(m_s_axi_wvalid_converter_signal);
400  mp_s_axi_wready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_wready_converter");
401  mp_s_axi_wready_converter->scalar_in(m_s_axi_wready_converter_signal);
402  mp_s_axi_wready_converter->vector_out(s_axi_wready);
403  mp_S00_AXI_transactor->WREADY(m_s_axi_wready_converter_signal);
404  mp_S00_AXI_transactor->BRESP(s_axi_bresp);
405  mp_s_axi_bvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_bvalid_converter");
406  mp_s_axi_bvalid_converter->scalar_in(m_s_axi_bvalid_converter_signal);
407  mp_s_axi_bvalid_converter->vector_out(s_axi_bvalid);
408  mp_S00_AXI_transactor->BVALID(m_s_axi_bvalid_converter_signal);
409  mp_s_axi_bready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_bready_converter");
410  mp_s_axi_bready_converter->vector_in(s_axi_bready);
411  mp_s_axi_bready_converter->scalar_out(m_s_axi_bready_converter_signal);
412  mp_S00_AXI_transactor->BREADY(m_s_axi_bready_converter_signal);
413  mp_S00_AXI_transactor->ARADDR(s_axi_araddr);
414  mp_S00_AXI_transactor->ARPROT(s_axi_arprot);
415  mp_s_axi_arvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_arvalid_converter");
416  mp_s_axi_arvalid_converter->vector_in(s_axi_arvalid);
417  mp_s_axi_arvalid_converter->scalar_out(m_s_axi_arvalid_converter_signal);
418  mp_S00_AXI_transactor->ARVALID(m_s_axi_arvalid_converter_signal);
419  mp_s_axi_arready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_arready_converter");
420  mp_s_axi_arready_converter->scalar_in(m_s_axi_arready_converter_signal);
421  mp_s_axi_arready_converter->vector_out(s_axi_arready);
422  mp_S00_AXI_transactor->ARREADY(m_s_axi_arready_converter_signal);
423  mp_S00_AXI_transactor->RDATA(s_axi_rdata);
424  mp_S00_AXI_transactor->RRESP(s_axi_rresp);
425  mp_s_axi_rvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_rvalid_converter");
426  mp_s_axi_rvalid_converter->scalar_in(m_s_axi_rvalid_converter_signal);
427  mp_s_axi_rvalid_converter->vector_out(s_axi_rvalid);
428  mp_S00_AXI_transactor->RVALID(m_s_axi_rvalid_converter_signal);
429  mp_s_axi_rready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_rready_converter");
430  mp_s_axi_rready_converter->vector_in(s_axi_rready);
431  mp_s_axi_rready_converter->scalar_out(m_s_axi_rready_converter_signal);
432  mp_S00_AXI_transactor->RREADY(m_s_axi_rready_converter_signal);
433  mp_S00_AXI_transactor->CLK(aclk);
434  mp_S00_AXI_transactor->RST(aresetn);
435 
436  // S00_AXI' transactor sockets
437 
438  mp_impl->target_0_rd_socket->bind(*(mp_S00_AXI_transactor->rd_socket));
439  mp_impl->target_0_wr_socket->bind(*(mp_S00_AXI_transactor->wr_socket));
440  }
441  else
442  {
443  }
444 
445  // configure 'M00_AXI' transactor
446 
447  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M00_AXI_TLM_MODE") != 1)
448  {
449  // Instantiate Socket Stubs
450 
451  // 'M00_AXI' transactor parameters
452  xsc::common_cpp::properties M00_AXI_transactor_param_props;
453  M00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
454  M00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
455  M00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
456  M00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
457  M00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
458  M00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
459  M00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
460  M00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
461  M00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
462  M00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
463  M00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
464  M00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
465  M00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
466  M00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
467  M00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
468  M00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
469  M00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
470  M00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
471  M00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
472  M00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
473  M00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
474  M00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
475  M00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
476  M00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
477  M00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
478  M00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
479  M00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
480  M00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
481  M00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
482  M00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
483  M00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
484  M00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
485 
486  mp_M00_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M00_AXI_transactor", M00_AXI_transactor_param_props);
487 
488  // M00_AXI' transactor ports
489 
490  mp_m_axi_awaddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_0");
491  mp_m_axi_awaddr_converter_0->vector_in(m_m_axi_awaddr_converter_0_signal);
492  mp_m_axi_awaddr_converter_0->vector_out(m_axi_concat_awaddr_out_0);
493  mp_M00_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_0_signal);
494  mp_m_axi_awprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_0");
495  mp_m_axi_awprot_converter_0->vector_in(m_m_axi_awprot_converter_0_signal);
496  mp_m_axi_awprot_converter_0->vector_out(m_axi_concat_awprot_out_0);
497  mp_M00_AXI_transactor->AWPROT(m_m_axi_awprot_converter_0_signal);
498  mp_m_axi_awvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_0");
499  mp_m_axi_awvalid_converter_0->scalar_in(m_m_axi_awvalid_converter_0_signal);
500  mp_m_axi_awvalid_converter_0->vector_out(m_axi_concat_awvalid_out_0);
501  mp_M00_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_0_signal);
502  mp_m_axi_awready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_0");
503  mp_m_axi_awready_converter_0->vector_in(m_axi_split_awready_out_0);
504  mp_m_axi_awready_converter_0->scalar_out(m_m_axi_awready_converter_0_signal);
505  mp_M00_AXI_transactor->AWREADY(m_m_axi_awready_converter_0_signal);
506  mp_m_axi_wdata_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_0");
507  mp_m_axi_wdata_converter_0->vector_in(m_m_axi_wdata_converter_0_signal);
508  mp_m_axi_wdata_converter_0->vector_out(m_axi_concat_wdata_out_0);
509  mp_M00_AXI_transactor->WDATA(m_m_axi_wdata_converter_0_signal);
510  mp_m_axi_wstrb_converter_0 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_0");
511  mp_m_axi_wstrb_converter_0->vector_in(m_m_axi_wstrb_converter_0_signal);
512  mp_m_axi_wstrb_converter_0->vector_out(m_axi_concat_wstrb_out_0);
513  mp_M00_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_0_signal);
514  mp_m_axi_wvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_0");
515  mp_m_axi_wvalid_converter_0->scalar_in(m_m_axi_wvalid_converter_0_signal);
516  mp_m_axi_wvalid_converter_0->vector_out(m_axi_concat_wvalid_out_0);
517  mp_M00_AXI_transactor->WVALID(m_m_axi_wvalid_converter_0_signal);
518  mp_m_axi_wready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_0");
519  mp_m_axi_wready_converter_0->vector_in(m_axi_split_wready_out_0);
520  mp_m_axi_wready_converter_0->scalar_out(m_m_axi_wready_converter_0_signal);
521  mp_M00_AXI_transactor->WREADY(m_m_axi_wready_converter_0_signal);
522  mp_m_axi_bresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_0");
523  mp_m_axi_bresp_converter_0->vector_in(m_axi_split_bresp_out_0);
524  mp_m_axi_bresp_converter_0->vector_out(m_m_axi_bresp_converter_0_signal);
525  mp_M00_AXI_transactor->BRESP(m_m_axi_bresp_converter_0_signal);
526  mp_m_axi_bvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_0");
527  mp_m_axi_bvalid_converter_0->vector_in(m_axi_split_bvalid_out_0);
528  mp_m_axi_bvalid_converter_0->scalar_out(m_m_axi_bvalid_converter_0_signal);
529  mp_M00_AXI_transactor->BVALID(m_m_axi_bvalid_converter_0_signal);
530  mp_m_axi_bready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_0");
531  mp_m_axi_bready_converter_0->scalar_in(m_m_axi_bready_converter_0_signal);
532  mp_m_axi_bready_converter_0->vector_out(m_axi_concat_bready_out_0);
533  mp_M00_AXI_transactor->BREADY(m_m_axi_bready_converter_0_signal);
534  mp_m_axi_araddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_0");
535  mp_m_axi_araddr_converter_0->vector_in(m_m_axi_araddr_converter_0_signal);
536  mp_m_axi_araddr_converter_0->vector_out(m_axi_concat_araddr_out_0);
537  mp_M00_AXI_transactor->ARADDR(m_m_axi_araddr_converter_0_signal);
538  mp_m_axi_arprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_0");
539  mp_m_axi_arprot_converter_0->vector_in(m_m_axi_arprot_converter_0_signal);
540  mp_m_axi_arprot_converter_0->vector_out(m_axi_concat_arprot_out_0);
541  mp_M00_AXI_transactor->ARPROT(m_m_axi_arprot_converter_0_signal);
542  mp_m_axi_arvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_0");
543  mp_m_axi_arvalid_converter_0->scalar_in(m_m_axi_arvalid_converter_0_signal);
544  mp_m_axi_arvalid_converter_0->vector_out(m_axi_concat_arvalid_out_0);
545  mp_M00_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_0_signal);
546  mp_m_axi_arready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_0");
547  mp_m_axi_arready_converter_0->vector_in(m_axi_split_arready_out_0);
548  mp_m_axi_arready_converter_0->scalar_out(m_m_axi_arready_converter_0_signal);
549  mp_M00_AXI_transactor->ARREADY(m_m_axi_arready_converter_0_signal);
550  mp_m_axi_rdata_converter_0 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_0");
551  mp_m_axi_rdata_converter_0->vector_in(m_axi_split_rdata_out_0);
552  mp_m_axi_rdata_converter_0->vector_out(m_m_axi_rdata_converter_0_signal);
553  mp_M00_AXI_transactor->RDATA(m_m_axi_rdata_converter_0_signal);
554  mp_m_axi_rresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_0");
555  mp_m_axi_rresp_converter_0->vector_in(m_axi_split_rresp_out_0);
556  mp_m_axi_rresp_converter_0->vector_out(m_m_axi_rresp_converter_0_signal);
557  mp_M00_AXI_transactor->RRESP(m_m_axi_rresp_converter_0_signal);
558  mp_m_axi_rvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_0");
559  mp_m_axi_rvalid_converter_0->vector_in(m_axi_split_rvalid_out_0);
560  mp_m_axi_rvalid_converter_0->scalar_out(m_m_axi_rvalid_converter_0_signal);
561  mp_M00_AXI_transactor->RVALID(m_m_axi_rvalid_converter_0_signal);
562  mp_m_axi_rready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_0");
563  mp_m_axi_rready_converter_0->scalar_in(m_m_axi_rready_converter_0_signal);
564  mp_m_axi_rready_converter_0->vector_out(m_axi_concat_rready_out_0);
565  mp_M00_AXI_transactor->RREADY(m_m_axi_rready_converter_0_signal);
566  mp_M00_AXI_transactor->CLK(aclk);
567  mp_M00_AXI_transactor->RST(aresetn);
568 
569  // M00_AXI' transactor sockets
570 
571  mp_impl->initiator_0_rd_socket->bind(*(mp_M00_AXI_transactor->rd_socket));
572  mp_impl->initiator_0_wr_socket->bind(*(mp_M00_AXI_transactor->wr_socket));
573  }
574  else
575  {
576  }
577 
578  // configure 'M01_AXI' transactor
579 
580  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M01_AXI_TLM_MODE") != 1)
581  {
582  // Instantiate Socket Stubs
583 
584  // 'M01_AXI' transactor parameters
585  xsc::common_cpp::properties M01_AXI_transactor_param_props;
586  M01_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
587  M01_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
588  M01_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
589  M01_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
590  M01_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
591  M01_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
592  M01_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
593  M01_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
594  M01_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
595  M01_AXI_transactor_param_props.addLong("HAS_BURST", "0");
596  M01_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
597  M01_AXI_transactor_param_props.addLong("HAS_PROT", "1");
598  M01_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
599  M01_AXI_transactor_param_props.addLong("HAS_QOS", "0");
600  M01_AXI_transactor_param_props.addLong("HAS_REGION", "0");
601  M01_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
602  M01_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
603  M01_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
604  M01_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
605  M01_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
606  M01_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
607  M01_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
608  M01_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
609  M01_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
610  M01_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
611  M01_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
612  M01_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
613  M01_AXI_transactor_param_props.addLong("HAS_RESET", "1");
614  M01_AXI_transactor_param_props.addFloat("PHASE", "0.000");
615  M01_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
616  M01_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
617  M01_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
618 
619  mp_M01_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M01_AXI_transactor", M01_AXI_transactor_param_props);
620 
621  // M01_AXI' transactor ports
622 
623  mp_m_axi_awaddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_1");
624  mp_m_axi_awaddr_converter_1->vector_in(m_m_axi_awaddr_converter_1_signal);
625  mp_m_axi_awaddr_converter_1->vector_out(m_axi_concat_awaddr_out_1);
626  mp_M01_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_1_signal);
627  mp_m_axi_awprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_1");
628  mp_m_axi_awprot_converter_1->vector_in(m_m_axi_awprot_converter_1_signal);
629  mp_m_axi_awprot_converter_1->vector_out(m_axi_concat_awprot_out_1);
630  mp_M01_AXI_transactor->AWPROT(m_m_axi_awprot_converter_1_signal);
631  mp_m_axi_awvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_1");
632  mp_m_axi_awvalid_converter_1->scalar_in(m_m_axi_awvalid_converter_1_signal);
633  mp_m_axi_awvalid_converter_1->vector_out(m_axi_concat_awvalid_out_1);
634  mp_M01_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_1_signal);
635  mp_m_axi_awready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_1");
636  mp_m_axi_awready_converter_1->vector_in(m_axi_split_awready_out_1);
637  mp_m_axi_awready_converter_1->scalar_out(m_m_axi_awready_converter_1_signal);
638  mp_M01_AXI_transactor->AWREADY(m_m_axi_awready_converter_1_signal);
639  mp_m_axi_wdata_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_1");
640  mp_m_axi_wdata_converter_1->vector_in(m_m_axi_wdata_converter_1_signal);
641  mp_m_axi_wdata_converter_1->vector_out(m_axi_concat_wdata_out_1);
642  mp_M01_AXI_transactor->WDATA(m_m_axi_wdata_converter_1_signal);
643  mp_m_axi_wstrb_converter_1 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_1");
644  mp_m_axi_wstrb_converter_1->vector_in(m_m_axi_wstrb_converter_1_signal);
645  mp_m_axi_wstrb_converter_1->vector_out(m_axi_concat_wstrb_out_1);
646  mp_M01_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_1_signal);
647  mp_m_axi_wvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_1");
648  mp_m_axi_wvalid_converter_1->scalar_in(m_m_axi_wvalid_converter_1_signal);
649  mp_m_axi_wvalid_converter_1->vector_out(m_axi_concat_wvalid_out_1);
650  mp_M01_AXI_transactor->WVALID(m_m_axi_wvalid_converter_1_signal);
651  mp_m_axi_wready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_1");
652  mp_m_axi_wready_converter_1->vector_in(m_axi_split_wready_out_1);
653  mp_m_axi_wready_converter_1->scalar_out(m_m_axi_wready_converter_1_signal);
654  mp_M01_AXI_transactor->WREADY(m_m_axi_wready_converter_1_signal);
655  mp_m_axi_bresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_1");
656  mp_m_axi_bresp_converter_1->vector_in(m_axi_split_bresp_out_1);
657  mp_m_axi_bresp_converter_1->vector_out(m_m_axi_bresp_converter_1_signal);
658  mp_M01_AXI_transactor->BRESP(m_m_axi_bresp_converter_1_signal);
659  mp_m_axi_bvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_1");
660  mp_m_axi_bvalid_converter_1->vector_in(m_axi_split_bvalid_out_1);
661  mp_m_axi_bvalid_converter_1->scalar_out(m_m_axi_bvalid_converter_1_signal);
662  mp_M01_AXI_transactor->BVALID(m_m_axi_bvalid_converter_1_signal);
663  mp_m_axi_bready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_1");
664  mp_m_axi_bready_converter_1->scalar_in(m_m_axi_bready_converter_1_signal);
665  mp_m_axi_bready_converter_1->vector_out(m_axi_concat_bready_out_1);
666  mp_M01_AXI_transactor->BREADY(m_m_axi_bready_converter_1_signal);
667  mp_m_axi_araddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_1");
668  mp_m_axi_araddr_converter_1->vector_in(m_m_axi_araddr_converter_1_signal);
669  mp_m_axi_araddr_converter_1->vector_out(m_axi_concat_araddr_out_1);
670  mp_M01_AXI_transactor->ARADDR(m_m_axi_araddr_converter_1_signal);
671  mp_m_axi_arprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_1");
672  mp_m_axi_arprot_converter_1->vector_in(m_m_axi_arprot_converter_1_signal);
673  mp_m_axi_arprot_converter_1->vector_out(m_axi_concat_arprot_out_1);
674  mp_M01_AXI_transactor->ARPROT(m_m_axi_arprot_converter_1_signal);
675  mp_m_axi_arvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_1");
676  mp_m_axi_arvalid_converter_1->scalar_in(m_m_axi_arvalid_converter_1_signal);
677  mp_m_axi_arvalid_converter_1->vector_out(m_axi_concat_arvalid_out_1);
678  mp_M01_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_1_signal);
679  mp_m_axi_arready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_1");
680  mp_m_axi_arready_converter_1->vector_in(m_axi_split_arready_out_1);
681  mp_m_axi_arready_converter_1->scalar_out(m_m_axi_arready_converter_1_signal);
682  mp_M01_AXI_transactor->ARREADY(m_m_axi_arready_converter_1_signal);
683  mp_m_axi_rdata_converter_1 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_1");
684  mp_m_axi_rdata_converter_1->vector_in(m_axi_split_rdata_out_1);
685  mp_m_axi_rdata_converter_1->vector_out(m_m_axi_rdata_converter_1_signal);
686  mp_M01_AXI_transactor->RDATA(m_m_axi_rdata_converter_1_signal);
687  mp_m_axi_rresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_1");
688  mp_m_axi_rresp_converter_1->vector_in(m_axi_split_rresp_out_1);
689  mp_m_axi_rresp_converter_1->vector_out(m_m_axi_rresp_converter_1_signal);
690  mp_M01_AXI_transactor->RRESP(m_m_axi_rresp_converter_1_signal);
691  mp_m_axi_rvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_1");
692  mp_m_axi_rvalid_converter_1->vector_in(m_axi_split_rvalid_out_1);
693  mp_m_axi_rvalid_converter_1->scalar_out(m_m_axi_rvalid_converter_1_signal);
694  mp_M01_AXI_transactor->RVALID(m_m_axi_rvalid_converter_1_signal);
695  mp_m_axi_rready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_1");
696  mp_m_axi_rready_converter_1->scalar_in(m_m_axi_rready_converter_1_signal);
697  mp_m_axi_rready_converter_1->vector_out(m_axi_concat_rready_out_1);
698  mp_M01_AXI_transactor->RREADY(m_m_axi_rready_converter_1_signal);
699  mp_M01_AXI_transactor->CLK(aclk);
700  mp_M01_AXI_transactor->RST(aresetn);
701 
702  // M01_AXI' transactor sockets
703 
704  mp_impl->initiator_1_rd_socket->bind(*(mp_M01_AXI_transactor->rd_socket));
705  mp_impl->initiator_1_wr_socket->bind(*(mp_M01_AXI_transactor->wr_socket));
706  }
707  else
708  {
709  }
710 
711  // configure 'M02_AXI' transactor
712 
713  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M02_AXI_TLM_MODE") != 1)
714  {
715  // Instantiate Socket Stubs
716 
717  // 'M02_AXI' transactor parameters
718  xsc::common_cpp::properties M02_AXI_transactor_param_props;
719  M02_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
720  M02_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
721  M02_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
722  M02_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
723  M02_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
724  M02_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
725  M02_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
726  M02_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
727  M02_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
728  M02_AXI_transactor_param_props.addLong("HAS_BURST", "0");
729  M02_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
730  M02_AXI_transactor_param_props.addLong("HAS_PROT", "1");
731  M02_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
732  M02_AXI_transactor_param_props.addLong("HAS_QOS", "0");
733  M02_AXI_transactor_param_props.addLong("HAS_REGION", "0");
734  M02_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
735  M02_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
736  M02_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
737  M02_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
738  M02_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
739  M02_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
740  M02_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
741  M02_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
742  M02_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
743  M02_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
744  M02_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
745  M02_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
746  M02_AXI_transactor_param_props.addLong("HAS_RESET", "1");
747  M02_AXI_transactor_param_props.addFloat("PHASE", "0.000");
748  M02_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
749  M02_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
750  M02_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
751 
752  mp_M02_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M02_AXI_transactor", M02_AXI_transactor_param_props);
753 
754  // M02_AXI' transactor ports
755 
756  mp_m_axi_awaddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_2");
757  mp_m_axi_awaddr_converter_2->vector_in(m_m_axi_awaddr_converter_2_signal);
758  mp_m_axi_awaddr_converter_2->vector_out(m_axi_concat_awaddr_out_2);
759  mp_M02_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_2_signal);
760  mp_m_axi_awprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_2");
761  mp_m_axi_awprot_converter_2->vector_in(m_m_axi_awprot_converter_2_signal);
762  mp_m_axi_awprot_converter_2->vector_out(m_axi_concat_awprot_out_2);
763  mp_M02_AXI_transactor->AWPROT(m_m_axi_awprot_converter_2_signal);
764  mp_m_axi_awvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_2");
765  mp_m_axi_awvalid_converter_2->scalar_in(m_m_axi_awvalid_converter_2_signal);
766  mp_m_axi_awvalid_converter_2->vector_out(m_axi_concat_awvalid_out_2);
767  mp_M02_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_2_signal);
768  mp_m_axi_awready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_2");
769  mp_m_axi_awready_converter_2->vector_in(m_axi_split_awready_out_2);
770  mp_m_axi_awready_converter_2->scalar_out(m_m_axi_awready_converter_2_signal);
771  mp_M02_AXI_transactor->AWREADY(m_m_axi_awready_converter_2_signal);
772  mp_m_axi_wdata_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_2");
773  mp_m_axi_wdata_converter_2->vector_in(m_m_axi_wdata_converter_2_signal);
774  mp_m_axi_wdata_converter_2->vector_out(m_axi_concat_wdata_out_2);
775  mp_M02_AXI_transactor->WDATA(m_m_axi_wdata_converter_2_signal);
776  mp_m_axi_wstrb_converter_2 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_2");
777  mp_m_axi_wstrb_converter_2->vector_in(m_m_axi_wstrb_converter_2_signal);
778  mp_m_axi_wstrb_converter_2->vector_out(m_axi_concat_wstrb_out_2);
779  mp_M02_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_2_signal);
780  mp_m_axi_wvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_2");
781  mp_m_axi_wvalid_converter_2->scalar_in(m_m_axi_wvalid_converter_2_signal);
782  mp_m_axi_wvalid_converter_2->vector_out(m_axi_concat_wvalid_out_2);
783  mp_M02_AXI_transactor->WVALID(m_m_axi_wvalid_converter_2_signal);
784  mp_m_axi_wready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_2");
785  mp_m_axi_wready_converter_2->vector_in(m_axi_split_wready_out_2);
786  mp_m_axi_wready_converter_2->scalar_out(m_m_axi_wready_converter_2_signal);
787  mp_M02_AXI_transactor->WREADY(m_m_axi_wready_converter_2_signal);
788  mp_m_axi_bresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_2");
789  mp_m_axi_bresp_converter_2->vector_in(m_axi_split_bresp_out_2);
790  mp_m_axi_bresp_converter_2->vector_out(m_m_axi_bresp_converter_2_signal);
791  mp_M02_AXI_transactor->BRESP(m_m_axi_bresp_converter_2_signal);
792  mp_m_axi_bvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_2");
793  mp_m_axi_bvalid_converter_2->vector_in(m_axi_split_bvalid_out_2);
794  mp_m_axi_bvalid_converter_2->scalar_out(m_m_axi_bvalid_converter_2_signal);
795  mp_M02_AXI_transactor->BVALID(m_m_axi_bvalid_converter_2_signal);
796  mp_m_axi_bready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_2");
797  mp_m_axi_bready_converter_2->scalar_in(m_m_axi_bready_converter_2_signal);
798  mp_m_axi_bready_converter_2->vector_out(m_axi_concat_bready_out_2);
799  mp_M02_AXI_transactor->BREADY(m_m_axi_bready_converter_2_signal);
800  mp_m_axi_araddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_2");
801  mp_m_axi_araddr_converter_2->vector_in(m_m_axi_araddr_converter_2_signal);
802  mp_m_axi_araddr_converter_2->vector_out(m_axi_concat_araddr_out_2);
803  mp_M02_AXI_transactor->ARADDR(m_m_axi_araddr_converter_2_signal);
804  mp_m_axi_arprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_2");
805  mp_m_axi_arprot_converter_2->vector_in(m_m_axi_arprot_converter_2_signal);
806  mp_m_axi_arprot_converter_2->vector_out(m_axi_concat_arprot_out_2);
807  mp_M02_AXI_transactor->ARPROT(m_m_axi_arprot_converter_2_signal);
808  mp_m_axi_arvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_2");
809  mp_m_axi_arvalid_converter_2->scalar_in(m_m_axi_arvalid_converter_2_signal);
810  mp_m_axi_arvalid_converter_2->vector_out(m_axi_concat_arvalid_out_2);
811  mp_M02_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_2_signal);
812  mp_m_axi_arready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_2");
813  mp_m_axi_arready_converter_2->vector_in(m_axi_split_arready_out_2);
814  mp_m_axi_arready_converter_2->scalar_out(m_m_axi_arready_converter_2_signal);
815  mp_M02_AXI_transactor->ARREADY(m_m_axi_arready_converter_2_signal);
816  mp_m_axi_rdata_converter_2 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_2");
817  mp_m_axi_rdata_converter_2->vector_in(m_axi_split_rdata_out_2);
818  mp_m_axi_rdata_converter_2->vector_out(m_m_axi_rdata_converter_2_signal);
819  mp_M02_AXI_transactor->RDATA(m_m_axi_rdata_converter_2_signal);
820  mp_m_axi_rresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_2");
821  mp_m_axi_rresp_converter_2->vector_in(m_axi_split_rresp_out_2);
822  mp_m_axi_rresp_converter_2->vector_out(m_m_axi_rresp_converter_2_signal);
823  mp_M02_AXI_transactor->RRESP(m_m_axi_rresp_converter_2_signal);
824  mp_m_axi_rvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_2");
825  mp_m_axi_rvalid_converter_2->vector_in(m_axi_split_rvalid_out_2);
826  mp_m_axi_rvalid_converter_2->scalar_out(m_m_axi_rvalid_converter_2_signal);
827  mp_M02_AXI_transactor->RVALID(m_m_axi_rvalid_converter_2_signal);
828  mp_m_axi_rready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_2");
829  mp_m_axi_rready_converter_2->scalar_in(m_m_axi_rready_converter_2_signal);
830  mp_m_axi_rready_converter_2->vector_out(m_axi_concat_rready_out_2);
831  mp_M02_AXI_transactor->RREADY(m_m_axi_rready_converter_2_signal);
832  mp_M02_AXI_transactor->CLK(aclk);
833  mp_M02_AXI_transactor->RST(aresetn);
834 
835  // M02_AXI' transactor sockets
836 
837  mp_impl->initiator_2_rd_socket->bind(*(mp_M02_AXI_transactor->rd_socket));
838  mp_impl->initiator_2_wr_socket->bind(*(mp_M02_AXI_transactor->wr_socket));
839  }
840  else
841  {
842  }
843 
844 }
845 
846 #endif // XILINX_SIMULATOR
847 
848 
849 
850 
851 #ifdef XM_SYSTEMC
852 design_1_xbar_0::design_1_xbar_0(const sc_core::sc_module_name& nm) : design_1_xbar_0_sc(nm), aclk("aclk"), aresetn("aresetn"), s_axi_awaddr("s_axi_awaddr"), s_axi_awprot("s_axi_awprot"), s_axi_awvalid("s_axi_awvalid"), s_axi_awready("s_axi_awready"), s_axi_wdata("s_axi_wdata"), s_axi_wstrb("s_axi_wstrb"), s_axi_wvalid("s_axi_wvalid"), s_axi_wready("s_axi_wready"), s_axi_bresp("s_axi_bresp"), s_axi_bvalid("s_axi_bvalid"), s_axi_bready("s_axi_bready"), s_axi_araddr("s_axi_araddr"), s_axi_arprot("s_axi_arprot"), s_axi_arvalid("s_axi_arvalid"), s_axi_arready("s_axi_arready"), s_axi_rdata("s_axi_rdata"), s_axi_rresp("s_axi_rresp"), s_axi_rvalid("s_axi_rvalid"), s_axi_rready("s_axi_rready"), m_axi_awaddr("m_axi_awaddr"), m_axi_awprot("m_axi_awprot"), m_axi_awvalid("m_axi_awvalid"), m_axi_awready("m_axi_awready"), m_axi_wdata("m_axi_wdata"), m_axi_wstrb("m_axi_wstrb"), m_axi_wvalid("m_axi_wvalid"), m_axi_wready("m_axi_wready"), m_axi_bresp("m_axi_bresp"), m_axi_bvalid("m_axi_bvalid"), m_axi_bready("m_axi_bready"), m_axi_araddr("m_axi_araddr"), m_axi_arprot("m_axi_arprot"), m_axi_arvalid("m_axi_arvalid"), m_axi_arready("m_axi_arready"), m_axi_rdata("m_axi_rdata"), m_axi_rresp("m_axi_rresp"), m_axi_rvalid("m_axi_rvalid"), m_axi_rready("m_axi_rready")
853 {
854 
855  // initialize pins
856  mp_impl->aclk(aclk);
857  mp_impl->aresetn(aresetn);
858 
859  // initialize transactors
860  mp_S00_AXI_transactor = NULL;
861  mp_s_axi_awvalid_converter = NULL;
862  mp_s_axi_awready_converter = NULL;
863  mp_s_axi_wvalid_converter = NULL;
864  mp_s_axi_wready_converter = NULL;
865  mp_s_axi_bvalid_converter = NULL;
866  mp_s_axi_bready_converter = NULL;
867  mp_s_axi_arvalid_converter = NULL;
868  mp_s_axi_arready_converter = NULL;
869  mp_s_axi_rvalid_converter = NULL;
870  mp_s_axi_rready_converter = NULL;
871  mp_M00_AXI_transactor = NULL;
872  mp_m_axi_awaddr_converter_0 = NULL;
873  mp_m_axi_awprot_converter_0 = NULL;
874  mp_m_axi_awvalid_converter_0 = NULL;
875  mp_m_axi_awready_converter_0 = NULL;
876  mp_m_axi_wdata_converter_0 = NULL;
877  mp_m_axi_wstrb_converter_0 = NULL;
878  mp_m_axi_wvalid_converter_0 = NULL;
879  mp_m_axi_wready_converter_0 = NULL;
880  mp_m_axi_bresp_converter_0 = NULL;
881  mp_m_axi_bvalid_converter_0 = NULL;
882  mp_m_axi_bready_converter_0 = NULL;
883  mp_m_axi_araddr_converter_0 = NULL;
884  mp_m_axi_arprot_converter_0 = NULL;
885  mp_m_axi_arvalid_converter_0 = NULL;
886  mp_m_axi_arready_converter_0 = NULL;
887  mp_m_axi_rdata_converter_0 = NULL;
888  mp_m_axi_rresp_converter_0 = NULL;
889  mp_m_axi_rvalid_converter_0 = NULL;
890  mp_m_axi_rready_converter_0 = NULL;
891  mp_M01_AXI_transactor = NULL;
892  mp_m_axi_awaddr_converter_1 = NULL;
893  mp_m_axi_awprot_converter_1 = NULL;
894  mp_m_axi_awvalid_converter_1 = NULL;
895  mp_m_axi_awready_converter_1 = NULL;
896  mp_m_axi_wdata_converter_1 = NULL;
897  mp_m_axi_wstrb_converter_1 = NULL;
898  mp_m_axi_wvalid_converter_1 = NULL;
899  mp_m_axi_wready_converter_1 = NULL;
900  mp_m_axi_bresp_converter_1 = NULL;
901  mp_m_axi_bvalid_converter_1 = NULL;
902  mp_m_axi_bready_converter_1 = NULL;
903  mp_m_axi_araddr_converter_1 = NULL;
904  mp_m_axi_arprot_converter_1 = NULL;
905  mp_m_axi_arvalid_converter_1 = NULL;
906  mp_m_axi_arready_converter_1 = NULL;
907  mp_m_axi_rdata_converter_1 = NULL;
908  mp_m_axi_rresp_converter_1 = NULL;
909  mp_m_axi_rvalid_converter_1 = NULL;
910  mp_m_axi_rready_converter_1 = NULL;
911  mp_M02_AXI_transactor = NULL;
912  mp_m_axi_awaddr_converter_2 = NULL;
913  mp_m_axi_awprot_converter_2 = NULL;
914  mp_m_axi_awvalid_converter_2 = NULL;
915  mp_m_axi_awready_converter_2 = NULL;
916  mp_m_axi_wdata_converter_2 = NULL;
917  mp_m_axi_wstrb_converter_2 = NULL;
918  mp_m_axi_wvalid_converter_2 = NULL;
919  mp_m_axi_wready_converter_2 = NULL;
920  mp_m_axi_bresp_converter_2 = NULL;
921  mp_m_axi_bvalid_converter_2 = NULL;
922  mp_m_axi_bready_converter_2 = NULL;
923  mp_m_axi_araddr_converter_2 = NULL;
924  mp_m_axi_arprot_converter_2 = NULL;
925  mp_m_axi_arvalid_converter_2 = NULL;
926  mp_m_axi_arready_converter_2 = NULL;
927  mp_m_axi_rdata_converter_2 = NULL;
928  mp_m_axi_rresp_converter_2 = NULL;
929  mp_m_axi_rvalid_converter_2 = NULL;
930  mp_m_axi_rready_converter_2 = NULL;
931 
932  // initialize junctures
933  mp_m_axi_concat_araddr = NULL;
934  mp_m_axi_concat_arprot = NULL;
935  mp_m_axi_concat_arvalid = NULL;
936  mp_m_axi_concat_awaddr = NULL;
937  mp_m_axi_concat_awprot = NULL;
938  mp_m_axi_concat_awvalid = NULL;
939  mp_m_axi_concat_bready = NULL;
940  mp_m_axi_concat_rready = NULL;
941  mp_m_axi_concat_wdata = NULL;
942  mp_m_axi_concat_wstrb = NULL;
943  mp_m_axi_concat_wvalid = NULL;
944  mp_m_axi_split_arready = NULL;
945  mp_m_axi_split_awready = NULL;
946  mp_m_axi_split_bresp = NULL;
947  mp_m_axi_split_bvalid = NULL;
948  mp_m_axi_split_rdata = NULL;
949  mp_m_axi_split_rresp = NULL;
950  mp_m_axi_split_rvalid = NULL;
951  mp_m_axi_split_wready = NULL;
952  mp_m_axi_concat_awaddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_awaddr");
953  mp_m_axi_concat_awaddr->in_port[0](m_axi_concat_awaddr_out_0);
954  mp_m_axi_concat_awaddr->out_port(m_axi_awaddr);
955  mp_m_axi_concat_awaddr->offset_port(0, 0);
956  mp_m_axi_concat_awprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_awprot");
957  mp_m_axi_concat_awprot->in_port[0](m_axi_concat_awprot_out_0);
958  mp_m_axi_concat_awprot->out_port(m_axi_awprot);
959  mp_m_axi_concat_awprot->offset_port(0, 0);
960  mp_m_axi_concat_awvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_awvalid");
961  mp_m_axi_concat_awvalid->in_port[0](m_axi_concat_awvalid_out_0);
962  mp_m_axi_concat_awvalid->out_port(m_axi_awvalid);
963  mp_m_axi_concat_awvalid->offset_port(0, 0);
964  mp_m_axi_split_awready = new xsc::xsc_split<3, 3>("m_axi_split_awready");
965  mp_m_axi_split_awready->in_port(m_axi_awready);
966  mp_m_axi_split_awready->out_port[0](m_axi_split_awready_out_0);
967  mp_m_axi_split_awready->add_mask(0,1,0);
968  mp_m_axi_concat_wdata = new xsc::xsc_concatenator<96, 3>("m_axi_concat_wdata");
969  mp_m_axi_concat_wdata->in_port[0](m_axi_concat_wdata_out_0);
970  mp_m_axi_concat_wdata->out_port(m_axi_wdata);
971  mp_m_axi_concat_wdata->offset_port(0, 0);
972  mp_m_axi_concat_wstrb = new xsc::xsc_concatenator<12, 3>("m_axi_concat_wstrb");
973  mp_m_axi_concat_wstrb->in_port[0](m_axi_concat_wstrb_out_0);
974  mp_m_axi_concat_wstrb->out_port(m_axi_wstrb);
975  mp_m_axi_concat_wstrb->offset_port(0, 0);
976  mp_m_axi_concat_wvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_wvalid");
977  mp_m_axi_concat_wvalid->in_port[0](m_axi_concat_wvalid_out_0);
978  mp_m_axi_concat_wvalid->out_port(m_axi_wvalid);
979  mp_m_axi_concat_wvalid->offset_port(0, 0);
980  mp_m_axi_split_wready = new xsc::xsc_split<3, 3>("m_axi_split_wready");
981  mp_m_axi_split_wready->in_port(m_axi_wready);
982  mp_m_axi_split_wready->out_port[0](m_axi_split_wready_out_0);
983  mp_m_axi_split_wready->add_mask(0,1,0);
984  mp_m_axi_split_bresp = new xsc::xsc_split<6, 3>("m_axi_split_bresp");
985  mp_m_axi_split_bresp->in_port(m_axi_bresp);
986  mp_m_axi_split_bresp->out_port[0](m_axi_split_bresp_out_0);
987  mp_m_axi_split_bresp->add_mask(0,2,0);
988  mp_m_axi_split_bvalid = new xsc::xsc_split<3, 3>("m_axi_split_bvalid");
989  mp_m_axi_split_bvalid->in_port(m_axi_bvalid);
990  mp_m_axi_split_bvalid->out_port[0](m_axi_split_bvalid_out_0);
991  mp_m_axi_split_bvalid->add_mask(0,1,0);
992  mp_m_axi_concat_bready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_bready");
993  mp_m_axi_concat_bready->in_port[0](m_axi_concat_bready_out_0);
994  mp_m_axi_concat_bready->out_port(m_axi_bready);
995  mp_m_axi_concat_bready->offset_port(0, 0);
996  mp_m_axi_concat_araddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_araddr");
997  mp_m_axi_concat_araddr->in_port[0](m_axi_concat_araddr_out_0);
998  mp_m_axi_concat_araddr->out_port(m_axi_araddr);
999  mp_m_axi_concat_araddr->offset_port(0, 0);
1000  mp_m_axi_concat_arprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_arprot");
1001  mp_m_axi_concat_arprot->in_port[0](m_axi_concat_arprot_out_0);
1002  mp_m_axi_concat_arprot->out_port(m_axi_arprot);
1003  mp_m_axi_concat_arprot->offset_port(0, 0);
1004  mp_m_axi_concat_arvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_arvalid");
1005  mp_m_axi_concat_arvalid->in_port[0](m_axi_concat_arvalid_out_0);
1006  mp_m_axi_concat_arvalid->out_port(m_axi_arvalid);
1007  mp_m_axi_concat_arvalid->offset_port(0, 0);
1008  mp_m_axi_split_arready = new xsc::xsc_split<3, 3>("m_axi_split_arready");
1009  mp_m_axi_split_arready->in_port(m_axi_arready);
1010  mp_m_axi_split_arready->out_port[0](m_axi_split_arready_out_0);
1011  mp_m_axi_split_arready->add_mask(0,1,0);
1012  mp_m_axi_split_rdata = new xsc::xsc_split<96, 3>("m_axi_split_rdata");
1013  mp_m_axi_split_rdata->in_port(m_axi_rdata);
1014  mp_m_axi_split_rdata->out_port[0](m_axi_split_rdata_out_0);
1015  mp_m_axi_split_rdata->add_mask(0,32,0);
1016  mp_m_axi_split_rresp = new xsc::xsc_split<6, 3>("m_axi_split_rresp");
1017  mp_m_axi_split_rresp->in_port(m_axi_rresp);
1018  mp_m_axi_split_rresp->out_port[0](m_axi_split_rresp_out_0);
1019  mp_m_axi_split_rresp->add_mask(0,2,0);
1020  mp_m_axi_split_rvalid = new xsc::xsc_split<3, 3>("m_axi_split_rvalid");
1021  mp_m_axi_split_rvalid->in_port(m_axi_rvalid);
1022  mp_m_axi_split_rvalid->out_port[0](m_axi_split_rvalid_out_0);
1023  mp_m_axi_split_rvalid->add_mask(0,1,0);
1024  mp_m_axi_concat_rready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_rready");
1025  mp_m_axi_concat_rready->in_port[0](m_axi_concat_rready_out_0);
1026  mp_m_axi_concat_rready->out_port(m_axi_rready);
1027  mp_m_axi_concat_rready->offset_port(0, 0);
1028  mp_m_axi_concat_awaddr->in_port[1](m_axi_concat_awaddr_out_1);
1029  mp_m_axi_concat_awaddr->offset_port(1, 32);
1030  mp_m_axi_concat_awprot->in_port[1](m_axi_concat_awprot_out_1);
1031  mp_m_axi_concat_awprot->offset_port(1, 3);
1032  mp_m_axi_concat_awvalid->in_port[1](m_axi_concat_awvalid_out_1);
1033  mp_m_axi_concat_awvalid->offset_port(1, 1);
1034 
1035  mp_m_axi_split_awready->out_port[1](m_axi_split_awready_out_1);
1036  mp_m_axi_split_awready->add_mask(1,2,1);
1037  mp_m_axi_concat_wdata->in_port[1](m_axi_concat_wdata_out_1);
1038  mp_m_axi_concat_wdata->offset_port(1, 32);
1039  mp_m_axi_concat_wstrb->in_port[1](m_axi_concat_wstrb_out_1);
1040  mp_m_axi_concat_wstrb->offset_port(1, 4);
1041  mp_m_axi_concat_wvalid->in_port[1](m_axi_concat_wvalid_out_1);
1042  mp_m_axi_concat_wvalid->offset_port(1, 1);
1043 
1044  mp_m_axi_split_wready->out_port[1](m_axi_split_wready_out_1);
1045  mp_m_axi_split_wready->add_mask(1,2,1);
1046 
1047  mp_m_axi_split_bresp->out_port[1](m_axi_split_bresp_out_1);
1048  mp_m_axi_split_bresp->add_mask(1,4,2);
1049 
1050  mp_m_axi_split_bvalid->out_port[1](m_axi_split_bvalid_out_1);
1051  mp_m_axi_split_bvalid->add_mask(1,2,1);
1052  mp_m_axi_concat_bready->in_port[1](m_axi_concat_bready_out_1);
1053  mp_m_axi_concat_bready->offset_port(1, 1);
1054  mp_m_axi_concat_araddr->in_port[1](m_axi_concat_araddr_out_1);
1055  mp_m_axi_concat_araddr->offset_port(1, 32);
1056  mp_m_axi_concat_arprot->in_port[1](m_axi_concat_arprot_out_1);
1057  mp_m_axi_concat_arprot->offset_port(1, 3);
1058  mp_m_axi_concat_arvalid->in_port[1](m_axi_concat_arvalid_out_1);
1059  mp_m_axi_concat_arvalid->offset_port(1, 1);
1060 
1061  mp_m_axi_split_arready->out_port[1](m_axi_split_arready_out_1);
1062  mp_m_axi_split_arready->add_mask(1,2,1);
1063 
1064  mp_m_axi_split_rdata->out_port[1](m_axi_split_rdata_out_1);
1065  mp_m_axi_split_rdata->add_mask(1,64,32);
1066 
1067  mp_m_axi_split_rresp->out_port[1](m_axi_split_rresp_out_1);
1068  mp_m_axi_split_rresp->add_mask(1,4,2);
1069 
1070  mp_m_axi_split_rvalid->out_port[1](m_axi_split_rvalid_out_1);
1071  mp_m_axi_split_rvalid->add_mask(1,2,1);
1072  mp_m_axi_concat_rready->in_port[1](m_axi_concat_rready_out_1);
1073  mp_m_axi_concat_rready->offset_port(1, 1);
1074  mp_m_axi_concat_awaddr->in_port[2](m_axi_concat_awaddr_out_2);
1075  mp_m_axi_concat_awaddr->offset_port(2, 64);
1076  mp_m_axi_concat_awprot->in_port[2](m_axi_concat_awprot_out_2);
1077  mp_m_axi_concat_awprot->offset_port(2, 6);
1078  mp_m_axi_concat_awvalid->in_port[2](m_axi_concat_awvalid_out_2);
1079  mp_m_axi_concat_awvalid->offset_port(2, 2);
1080 
1081  mp_m_axi_split_awready->out_port[2](m_axi_split_awready_out_2);
1082  mp_m_axi_split_awready->add_mask(2,3,2);
1083  mp_m_axi_concat_wdata->in_port[2](m_axi_concat_wdata_out_2);
1084  mp_m_axi_concat_wdata->offset_port(2, 64);
1085  mp_m_axi_concat_wstrb->in_port[2](m_axi_concat_wstrb_out_2);
1086  mp_m_axi_concat_wstrb->offset_port(2, 8);
1087  mp_m_axi_concat_wvalid->in_port[2](m_axi_concat_wvalid_out_2);
1088  mp_m_axi_concat_wvalid->offset_port(2, 2);
1089 
1090  mp_m_axi_split_wready->out_port[2](m_axi_split_wready_out_2);
1091  mp_m_axi_split_wready->add_mask(2,3,2);
1092 
1093  mp_m_axi_split_bresp->out_port[2](m_axi_split_bresp_out_2);
1094  mp_m_axi_split_bresp->add_mask(2,6,4);
1095 
1096  mp_m_axi_split_bvalid->out_port[2](m_axi_split_bvalid_out_2);
1097  mp_m_axi_split_bvalid->add_mask(2,3,2);
1098  mp_m_axi_concat_bready->in_port[2](m_axi_concat_bready_out_2);
1099  mp_m_axi_concat_bready->offset_port(2, 2);
1100  mp_m_axi_concat_araddr->in_port[2](m_axi_concat_araddr_out_2);
1101  mp_m_axi_concat_araddr->offset_port(2, 64);
1102  mp_m_axi_concat_arprot->in_port[2](m_axi_concat_arprot_out_2);
1103  mp_m_axi_concat_arprot->offset_port(2, 6);
1104  mp_m_axi_concat_arvalid->in_port[2](m_axi_concat_arvalid_out_2);
1105  mp_m_axi_concat_arvalid->offset_port(2, 2);
1106 
1107  mp_m_axi_split_arready->out_port[2](m_axi_split_arready_out_2);
1108  mp_m_axi_split_arready->add_mask(2,3,2);
1109 
1110  mp_m_axi_split_rdata->out_port[2](m_axi_split_rdata_out_2);
1111  mp_m_axi_split_rdata->add_mask(2,96,64);
1112 
1113  mp_m_axi_split_rresp->out_port[2](m_axi_split_rresp_out_2);
1114  mp_m_axi_split_rresp->add_mask(2,6,4);
1115 
1116  mp_m_axi_split_rvalid->out_port[2](m_axi_split_rvalid_out_2);
1117  mp_m_axi_split_rvalid->add_mask(2,3,2);
1118  mp_m_axi_concat_rready->in_port[2](m_axi_concat_rready_out_2);
1119  mp_m_axi_concat_rready->offset_port(2, 2);
1120 
1121  // initialize socket stubs
1122 
1123 }
1124 
1125 void design_1_xbar_0::before_end_of_elaboration()
1126 {
1127  // configure 'S00_AXI' transactor
1128 
1129  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "S00_AXI_TLM_MODE") != 1)
1130  {
1131  // Instantiate Socket Stubs
1132 
1133  // 'S00_AXI' transactor parameters
1134  xsc::common_cpp::properties S00_AXI_transactor_param_props;
1135  S00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
1136  S00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
1137  S00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
1138  S00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
1139  S00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
1140  S00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
1141  S00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
1142  S00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
1143  S00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
1144  S00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
1145  S00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
1146  S00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
1147  S00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
1148  S00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
1149  S00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
1150  S00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
1151  S00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
1152  S00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
1153  S00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
1154  S00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "8");
1155  S00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "8");
1156  S00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
1157  S00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "4");
1158  S00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "4");
1159  S00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
1160  S00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
1161  S00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
1162  S00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
1163  S00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
1164  S00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
1165  S00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
1166  S00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
1167 
1168  mp_S00_AXI_transactor = new xtlm::xaximm_pin2xtlm_t<32,32,1,1,1,1,1,1>("S00_AXI_transactor", S00_AXI_transactor_param_props);
1169 
1170  // S00_AXI' transactor ports
1171 
1172  mp_S00_AXI_transactor->AWADDR(s_axi_awaddr);
1173  mp_S00_AXI_transactor->AWPROT(s_axi_awprot);
1174  mp_s_axi_awvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_awvalid_converter");
1175  mp_s_axi_awvalid_converter->vector_in(s_axi_awvalid);
1176  mp_s_axi_awvalid_converter->scalar_out(m_s_axi_awvalid_converter_signal);
1177  mp_S00_AXI_transactor->AWVALID(m_s_axi_awvalid_converter_signal);
1178  mp_s_axi_awready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_awready_converter");
1179  mp_s_axi_awready_converter->scalar_in(m_s_axi_awready_converter_signal);
1180  mp_s_axi_awready_converter->vector_out(s_axi_awready);
1181  mp_S00_AXI_transactor->AWREADY(m_s_axi_awready_converter_signal);
1182  mp_S00_AXI_transactor->WDATA(s_axi_wdata);
1183  mp_S00_AXI_transactor->WSTRB(s_axi_wstrb);
1184  mp_s_axi_wvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_wvalid_converter");
1185  mp_s_axi_wvalid_converter->vector_in(s_axi_wvalid);
1186  mp_s_axi_wvalid_converter->scalar_out(m_s_axi_wvalid_converter_signal);
1187  mp_S00_AXI_transactor->WVALID(m_s_axi_wvalid_converter_signal);
1188  mp_s_axi_wready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_wready_converter");
1189  mp_s_axi_wready_converter->scalar_in(m_s_axi_wready_converter_signal);
1190  mp_s_axi_wready_converter->vector_out(s_axi_wready);
1191  mp_S00_AXI_transactor->WREADY(m_s_axi_wready_converter_signal);
1192  mp_S00_AXI_transactor->BRESP(s_axi_bresp);
1193  mp_s_axi_bvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_bvalid_converter");
1194  mp_s_axi_bvalid_converter->scalar_in(m_s_axi_bvalid_converter_signal);
1195  mp_s_axi_bvalid_converter->vector_out(s_axi_bvalid);
1196  mp_S00_AXI_transactor->BVALID(m_s_axi_bvalid_converter_signal);
1197  mp_s_axi_bready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_bready_converter");
1198  mp_s_axi_bready_converter->vector_in(s_axi_bready);
1199  mp_s_axi_bready_converter->scalar_out(m_s_axi_bready_converter_signal);
1200  mp_S00_AXI_transactor->BREADY(m_s_axi_bready_converter_signal);
1201  mp_S00_AXI_transactor->ARADDR(s_axi_araddr);
1202  mp_S00_AXI_transactor->ARPROT(s_axi_arprot);
1203  mp_s_axi_arvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_arvalid_converter");
1204  mp_s_axi_arvalid_converter->vector_in(s_axi_arvalid);
1205  mp_s_axi_arvalid_converter->scalar_out(m_s_axi_arvalid_converter_signal);
1206  mp_S00_AXI_transactor->ARVALID(m_s_axi_arvalid_converter_signal);
1207  mp_s_axi_arready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_arready_converter");
1208  mp_s_axi_arready_converter->scalar_in(m_s_axi_arready_converter_signal);
1209  mp_s_axi_arready_converter->vector_out(s_axi_arready);
1210  mp_S00_AXI_transactor->ARREADY(m_s_axi_arready_converter_signal);
1211  mp_S00_AXI_transactor->RDATA(s_axi_rdata);
1212  mp_S00_AXI_transactor->RRESP(s_axi_rresp);
1213  mp_s_axi_rvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_rvalid_converter");
1214  mp_s_axi_rvalid_converter->scalar_in(m_s_axi_rvalid_converter_signal);
1215  mp_s_axi_rvalid_converter->vector_out(s_axi_rvalid);
1216  mp_S00_AXI_transactor->RVALID(m_s_axi_rvalid_converter_signal);
1217  mp_s_axi_rready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_rready_converter");
1218  mp_s_axi_rready_converter->vector_in(s_axi_rready);
1219  mp_s_axi_rready_converter->scalar_out(m_s_axi_rready_converter_signal);
1220  mp_S00_AXI_transactor->RREADY(m_s_axi_rready_converter_signal);
1221  mp_S00_AXI_transactor->CLK(aclk);
1222  mp_S00_AXI_transactor->RST(aresetn);
1223 
1224  // S00_AXI' transactor sockets
1225 
1226  mp_impl->target_0_rd_socket->bind(*(mp_S00_AXI_transactor->rd_socket));
1227  mp_impl->target_0_wr_socket->bind(*(mp_S00_AXI_transactor->wr_socket));
1228  }
1229  else
1230  {
1231  }
1232 
1233  // configure 'M00_AXI' transactor
1234 
1235  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M00_AXI_TLM_MODE") != 1)
1236  {
1237  // Instantiate Socket Stubs
1238 
1239  // 'M00_AXI' transactor parameters
1240  xsc::common_cpp::properties M00_AXI_transactor_param_props;
1241  M00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
1242  M00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
1243  M00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
1244  M00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
1245  M00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
1246  M00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
1247  M00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
1248  M00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
1249  M00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
1250  M00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
1251  M00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
1252  M00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
1253  M00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
1254  M00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
1255  M00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
1256  M00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
1257  M00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
1258  M00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
1259  M00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
1260  M00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
1261  M00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
1262  M00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
1263  M00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
1264  M00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
1265  M00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
1266  M00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
1267  M00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
1268  M00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
1269  M00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
1270  M00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
1271  M00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
1272  M00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
1273 
1274  mp_M00_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M00_AXI_transactor", M00_AXI_transactor_param_props);
1275 
1276  // M00_AXI' transactor ports
1277 
1278  mp_m_axi_awaddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_0");
1279  mp_m_axi_awaddr_converter_0->vector_in(m_m_axi_awaddr_converter_0_signal);
1280  mp_m_axi_awaddr_converter_0->vector_out(m_axi_concat_awaddr_out_0);
1281  mp_M00_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_0_signal);
1282  mp_m_axi_awprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_0");
1283  mp_m_axi_awprot_converter_0->vector_in(m_m_axi_awprot_converter_0_signal);
1284  mp_m_axi_awprot_converter_0->vector_out(m_axi_concat_awprot_out_0);
1285  mp_M00_AXI_transactor->AWPROT(m_m_axi_awprot_converter_0_signal);
1286  mp_m_axi_awvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_0");
1287  mp_m_axi_awvalid_converter_0->scalar_in(m_m_axi_awvalid_converter_0_signal);
1288  mp_m_axi_awvalid_converter_0->vector_out(m_axi_concat_awvalid_out_0);
1289  mp_M00_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_0_signal);
1290  mp_m_axi_awready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_0");
1291  mp_m_axi_awready_converter_0->vector_in(m_axi_split_awready_out_0);
1292  mp_m_axi_awready_converter_0->scalar_out(m_m_axi_awready_converter_0_signal);
1293  mp_M00_AXI_transactor->AWREADY(m_m_axi_awready_converter_0_signal);
1294  mp_m_axi_wdata_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_0");
1295  mp_m_axi_wdata_converter_0->vector_in(m_m_axi_wdata_converter_0_signal);
1296  mp_m_axi_wdata_converter_0->vector_out(m_axi_concat_wdata_out_0);
1297  mp_M00_AXI_transactor->WDATA(m_m_axi_wdata_converter_0_signal);
1298  mp_m_axi_wstrb_converter_0 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_0");
1299  mp_m_axi_wstrb_converter_0->vector_in(m_m_axi_wstrb_converter_0_signal);
1300  mp_m_axi_wstrb_converter_0->vector_out(m_axi_concat_wstrb_out_0);
1301  mp_M00_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_0_signal);
1302  mp_m_axi_wvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_0");
1303  mp_m_axi_wvalid_converter_0->scalar_in(m_m_axi_wvalid_converter_0_signal);
1304  mp_m_axi_wvalid_converter_0->vector_out(m_axi_concat_wvalid_out_0);
1305  mp_M00_AXI_transactor->WVALID(m_m_axi_wvalid_converter_0_signal);
1306  mp_m_axi_wready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_0");
1307  mp_m_axi_wready_converter_0->vector_in(m_axi_split_wready_out_0);
1308  mp_m_axi_wready_converter_0->scalar_out(m_m_axi_wready_converter_0_signal);
1309  mp_M00_AXI_transactor->WREADY(m_m_axi_wready_converter_0_signal);
1310  mp_m_axi_bresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_0");
1311  mp_m_axi_bresp_converter_0->vector_in(m_axi_split_bresp_out_0);
1312  mp_m_axi_bresp_converter_0->vector_out(m_m_axi_bresp_converter_0_signal);
1313  mp_M00_AXI_transactor->BRESP(m_m_axi_bresp_converter_0_signal);
1314  mp_m_axi_bvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_0");
1315  mp_m_axi_bvalid_converter_0->vector_in(m_axi_split_bvalid_out_0);
1316  mp_m_axi_bvalid_converter_0->scalar_out(m_m_axi_bvalid_converter_0_signal);
1317  mp_M00_AXI_transactor->BVALID(m_m_axi_bvalid_converter_0_signal);
1318  mp_m_axi_bready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_0");
1319  mp_m_axi_bready_converter_0->scalar_in(m_m_axi_bready_converter_0_signal);
1320  mp_m_axi_bready_converter_0->vector_out(m_axi_concat_bready_out_0);
1321  mp_M00_AXI_transactor->BREADY(m_m_axi_bready_converter_0_signal);
1322  mp_m_axi_araddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_0");
1323  mp_m_axi_araddr_converter_0->vector_in(m_m_axi_araddr_converter_0_signal);
1324  mp_m_axi_araddr_converter_0->vector_out(m_axi_concat_araddr_out_0);
1325  mp_M00_AXI_transactor->ARADDR(m_m_axi_araddr_converter_0_signal);
1326  mp_m_axi_arprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_0");
1327  mp_m_axi_arprot_converter_0->vector_in(m_m_axi_arprot_converter_0_signal);
1328  mp_m_axi_arprot_converter_0->vector_out(m_axi_concat_arprot_out_0);
1329  mp_M00_AXI_transactor->ARPROT(m_m_axi_arprot_converter_0_signal);
1330  mp_m_axi_arvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_0");
1331  mp_m_axi_arvalid_converter_0->scalar_in(m_m_axi_arvalid_converter_0_signal);
1332  mp_m_axi_arvalid_converter_0->vector_out(m_axi_concat_arvalid_out_0);
1333  mp_M00_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_0_signal);
1334  mp_m_axi_arready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_0");
1335  mp_m_axi_arready_converter_0->vector_in(m_axi_split_arready_out_0);
1336  mp_m_axi_arready_converter_0->scalar_out(m_m_axi_arready_converter_0_signal);
1337  mp_M00_AXI_transactor->ARREADY(m_m_axi_arready_converter_0_signal);
1338  mp_m_axi_rdata_converter_0 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_0");
1339  mp_m_axi_rdata_converter_0->vector_in(m_axi_split_rdata_out_0);
1340  mp_m_axi_rdata_converter_0->vector_out(m_m_axi_rdata_converter_0_signal);
1341  mp_M00_AXI_transactor->RDATA(m_m_axi_rdata_converter_0_signal);
1342  mp_m_axi_rresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_0");
1343  mp_m_axi_rresp_converter_0->vector_in(m_axi_split_rresp_out_0);
1344  mp_m_axi_rresp_converter_0->vector_out(m_m_axi_rresp_converter_0_signal);
1345  mp_M00_AXI_transactor->RRESP(m_m_axi_rresp_converter_0_signal);
1346  mp_m_axi_rvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_0");
1347  mp_m_axi_rvalid_converter_0->vector_in(m_axi_split_rvalid_out_0);
1348  mp_m_axi_rvalid_converter_0->scalar_out(m_m_axi_rvalid_converter_0_signal);
1349  mp_M00_AXI_transactor->RVALID(m_m_axi_rvalid_converter_0_signal);
1350  mp_m_axi_rready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_0");
1351  mp_m_axi_rready_converter_0->scalar_in(m_m_axi_rready_converter_0_signal);
1352  mp_m_axi_rready_converter_0->vector_out(m_axi_concat_rready_out_0);
1353  mp_M00_AXI_transactor->RREADY(m_m_axi_rready_converter_0_signal);
1354  mp_M00_AXI_transactor->CLK(aclk);
1355  mp_M00_AXI_transactor->RST(aresetn);
1356 
1357  // M00_AXI' transactor sockets
1358 
1359  mp_impl->initiator_0_rd_socket->bind(*(mp_M00_AXI_transactor->rd_socket));
1360  mp_impl->initiator_0_wr_socket->bind(*(mp_M00_AXI_transactor->wr_socket));
1361  }
1362  else
1363  {
1364  }
1365 
1366  // configure 'M01_AXI' transactor
1367 
1368  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M01_AXI_TLM_MODE") != 1)
1369  {
1370  // Instantiate Socket Stubs
1371 
1372  // 'M01_AXI' transactor parameters
1373  xsc::common_cpp::properties M01_AXI_transactor_param_props;
1374  M01_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
1375  M01_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
1376  M01_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
1377  M01_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
1378  M01_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
1379  M01_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
1380  M01_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
1381  M01_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
1382  M01_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
1383  M01_AXI_transactor_param_props.addLong("HAS_BURST", "0");
1384  M01_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
1385  M01_AXI_transactor_param_props.addLong("HAS_PROT", "1");
1386  M01_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
1387  M01_AXI_transactor_param_props.addLong("HAS_QOS", "0");
1388  M01_AXI_transactor_param_props.addLong("HAS_REGION", "0");
1389  M01_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
1390  M01_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
1391  M01_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
1392  M01_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
1393  M01_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
1394  M01_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
1395  M01_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
1396  M01_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
1397  M01_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
1398  M01_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
1399  M01_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
1400  M01_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
1401  M01_AXI_transactor_param_props.addLong("HAS_RESET", "1");
1402  M01_AXI_transactor_param_props.addFloat("PHASE", "0.000");
1403  M01_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
1404  M01_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
1405  M01_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
1406 
1407  mp_M01_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M01_AXI_transactor", M01_AXI_transactor_param_props);
1408 
1409  // M01_AXI' transactor ports
1410 
1411  mp_m_axi_awaddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_1");
1412  mp_m_axi_awaddr_converter_1->vector_in(m_m_axi_awaddr_converter_1_signal);
1413  mp_m_axi_awaddr_converter_1->vector_out(m_axi_concat_awaddr_out_1);
1414  mp_M01_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_1_signal);
1415  mp_m_axi_awprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_1");
1416  mp_m_axi_awprot_converter_1->vector_in(m_m_axi_awprot_converter_1_signal);
1417  mp_m_axi_awprot_converter_1->vector_out(m_axi_concat_awprot_out_1);
1418  mp_M01_AXI_transactor->AWPROT(m_m_axi_awprot_converter_1_signal);
1419  mp_m_axi_awvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_1");
1420  mp_m_axi_awvalid_converter_1->scalar_in(m_m_axi_awvalid_converter_1_signal);
1421  mp_m_axi_awvalid_converter_1->vector_out(m_axi_concat_awvalid_out_1);
1422  mp_M01_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_1_signal);
1423  mp_m_axi_awready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_1");
1424  mp_m_axi_awready_converter_1->vector_in(m_axi_split_awready_out_1);
1425  mp_m_axi_awready_converter_1->scalar_out(m_m_axi_awready_converter_1_signal);
1426  mp_M01_AXI_transactor->AWREADY(m_m_axi_awready_converter_1_signal);
1427  mp_m_axi_wdata_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_1");
1428  mp_m_axi_wdata_converter_1->vector_in(m_m_axi_wdata_converter_1_signal);
1429  mp_m_axi_wdata_converter_1->vector_out(m_axi_concat_wdata_out_1);
1430  mp_M01_AXI_transactor->WDATA(m_m_axi_wdata_converter_1_signal);
1431  mp_m_axi_wstrb_converter_1 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_1");
1432  mp_m_axi_wstrb_converter_1->vector_in(m_m_axi_wstrb_converter_1_signal);
1433  mp_m_axi_wstrb_converter_1->vector_out(m_axi_concat_wstrb_out_1);
1434  mp_M01_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_1_signal);
1435  mp_m_axi_wvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_1");
1436  mp_m_axi_wvalid_converter_1->scalar_in(m_m_axi_wvalid_converter_1_signal);
1437  mp_m_axi_wvalid_converter_1->vector_out(m_axi_concat_wvalid_out_1);
1438  mp_M01_AXI_transactor->WVALID(m_m_axi_wvalid_converter_1_signal);
1439  mp_m_axi_wready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_1");
1440  mp_m_axi_wready_converter_1->vector_in(m_axi_split_wready_out_1);
1441  mp_m_axi_wready_converter_1->scalar_out(m_m_axi_wready_converter_1_signal);
1442  mp_M01_AXI_transactor->WREADY(m_m_axi_wready_converter_1_signal);
1443  mp_m_axi_bresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_1");
1444  mp_m_axi_bresp_converter_1->vector_in(m_axi_split_bresp_out_1);
1445  mp_m_axi_bresp_converter_1->vector_out(m_m_axi_bresp_converter_1_signal);
1446  mp_M01_AXI_transactor->BRESP(m_m_axi_bresp_converter_1_signal);
1447  mp_m_axi_bvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_1");
1448  mp_m_axi_bvalid_converter_1->vector_in(m_axi_split_bvalid_out_1);
1449  mp_m_axi_bvalid_converter_1->scalar_out(m_m_axi_bvalid_converter_1_signal);
1450  mp_M01_AXI_transactor->BVALID(m_m_axi_bvalid_converter_1_signal);
1451  mp_m_axi_bready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_1");
1452  mp_m_axi_bready_converter_1->scalar_in(m_m_axi_bready_converter_1_signal);
1453  mp_m_axi_bready_converter_1->vector_out(m_axi_concat_bready_out_1);
1454  mp_M01_AXI_transactor->BREADY(m_m_axi_bready_converter_1_signal);
1455  mp_m_axi_araddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_1");
1456  mp_m_axi_araddr_converter_1->vector_in(m_m_axi_araddr_converter_1_signal);
1457  mp_m_axi_araddr_converter_1->vector_out(m_axi_concat_araddr_out_1);
1458  mp_M01_AXI_transactor->ARADDR(m_m_axi_araddr_converter_1_signal);
1459  mp_m_axi_arprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_1");
1460  mp_m_axi_arprot_converter_1->vector_in(m_m_axi_arprot_converter_1_signal);
1461  mp_m_axi_arprot_converter_1->vector_out(m_axi_concat_arprot_out_1);
1462  mp_M01_AXI_transactor->ARPROT(m_m_axi_arprot_converter_1_signal);
1463  mp_m_axi_arvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_1");
1464  mp_m_axi_arvalid_converter_1->scalar_in(m_m_axi_arvalid_converter_1_signal);
1465  mp_m_axi_arvalid_converter_1->vector_out(m_axi_concat_arvalid_out_1);
1466  mp_M01_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_1_signal);
1467  mp_m_axi_arready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_1");
1468  mp_m_axi_arready_converter_1->vector_in(m_axi_split_arready_out_1);
1469  mp_m_axi_arready_converter_1->scalar_out(m_m_axi_arready_converter_1_signal);
1470  mp_M01_AXI_transactor->ARREADY(m_m_axi_arready_converter_1_signal);
1471  mp_m_axi_rdata_converter_1 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_1");
1472  mp_m_axi_rdata_converter_1->vector_in(m_axi_split_rdata_out_1);
1473  mp_m_axi_rdata_converter_1->vector_out(m_m_axi_rdata_converter_1_signal);
1474  mp_M01_AXI_transactor->RDATA(m_m_axi_rdata_converter_1_signal);
1475  mp_m_axi_rresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_1");
1476  mp_m_axi_rresp_converter_1->vector_in(m_axi_split_rresp_out_1);
1477  mp_m_axi_rresp_converter_1->vector_out(m_m_axi_rresp_converter_1_signal);
1478  mp_M01_AXI_transactor->RRESP(m_m_axi_rresp_converter_1_signal);
1479  mp_m_axi_rvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_1");
1480  mp_m_axi_rvalid_converter_1->vector_in(m_axi_split_rvalid_out_1);
1481  mp_m_axi_rvalid_converter_1->scalar_out(m_m_axi_rvalid_converter_1_signal);
1482  mp_M01_AXI_transactor->RVALID(m_m_axi_rvalid_converter_1_signal);
1483  mp_m_axi_rready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_1");
1484  mp_m_axi_rready_converter_1->scalar_in(m_m_axi_rready_converter_1_signal);
1485  mp_m_axi_rready_converter_1->vector_out(m_axi_concat_rready_out_1);
1486  mp_M01_AXI_transactor->RREADY(m_m_axi_rready_converter_1_signal);
1487  mp_M01_AXI_transactor->CLK(aclk);
1488  mp_M01_AXI_transactor->RST(aresetn);
1489 
1490  // M01_AXI' transactor sockets
1491 
1492  mp_impl->initiator_1_rd_socket->bind(*(mp_M01_AXI_transactor->rd_socket));
1493  mp_impl->initiator_1_wr_socket->bind(*(mp_M01_AXI_transactor->wr_socket));
1494  }
1495  else
1496  {
1497  }
1498 
1499  // configure 'M02_AXI' transactor
1500 
1501  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M02_AXI_TLM_MODE") != 1)
1502  {
1503  // Instantiate Socket Stubs
1504 
1505  // 'M02_AXI' transactor parameters
1506  xsc::common_cpp::properties M02_AXI_transactor_param_props;
1507  M02_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
1508  M02_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
1509  M02_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
1510  M02_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
1511  M02_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
1512  M02_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
1513  M02_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
1514  M02_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
1515  M02_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
1516  M02_AXI_transactor_param_props.addLong("HAS_BURST", "0");
1517  M02_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
1518  M02_AXI_transactor_param_props.addLong("HAS_PROT", "1");
1519  M02_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
1520  M02_AXI_transactor_param_props.addLong("HAS_QOS", "0");
1521  M02_AXI_transactor_param_props.addLong("HAS_REGION", "0");
1522  M02_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
1523  M02_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
1524  M02_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
1525  M02_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
1526  M02_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
1527  M02_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
1528  M02_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
1529  M02_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
1530  M02_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
1531  M02_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
1532  M02_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
1533  M02_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
1534  M02_AXI_transactor_param_props.addLong("HAS_RESET", "1");
1535  M02_AXI_transactor_param_props.addFloat("PHASE", "0.000");
1536  M02_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
1537  M02_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
1538  M02_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
1539 
1540  mp_M02_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M02_AXI_transactor", M02_AXI_transactor_param_props);
1541 
1542  // M02_AXI' transactor ports
1543 
1544  mp_m_axi_awaddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_2");
1545  mp_m_axi_awaddr_converter_2->vector_in(m_m_axi_awaddr_converter_2_signal);
1546  mp_m_axi_awaddr_converter_2->vector_out(m_axi_concat_awaddr_out_2);
1547  mp_M02_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_2_signal);
1548  mp_m_axi_awprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_2");
1549  mp_m_axi_awprot_converter_2->vector_in(m_m_axi_awprot_converter_2_signal);
1550  mp_m_axi_awprot_converter_2->vector_out(m_axi_concat_awprot_out_2);
1551  mp_M02_AXI_transactor->AWPROT(m_m_axi_awprot_converter_2_signal);
1552  mp_m_axi_awvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_2");
1553  mp_m_axi_awvalid_converter_2->scalar_in(m_m_axi_awvalid_converter_2_signal);
1554  mp_m_axi_awvalid_converter_2->vector_out(m_axi_concat_awvalid_out_2);
1555  mp_M02_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_2_signal);
1556  mp_m_axi_awready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_2");
1557  mp_m_axi_awready_converter_2->vector_in(m_axi_split_awready_out_2);
1558  mp_m_axi_awready_converter_2->scalar_out(m_m_axi_awready_converter_2_signal);
1559  mp_M02_AXI_transactor->AWREADY(m_m_axi_awready_converter_2_signal);
1560  mp_m_axi_wdata_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_2");
1561  mp_m_axi_wdata_converter_2->vector_in(m_m_axi_wdata_converter_2_signal);
1562  mp_m_axi_wdata_converter_2->vector_out(m_axi_concat_wdata_out_2);
1563  mp_M02_AXI_transactor->WDATA(m_m_axi_wdata_converter_2_signal);
1564  mp_m_axi_wstrb_converter_2 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_2");
1565  mp_m_axi_wstrb_converter_2->vector_in(m_m_axi_wstrb_converter_2_signal);
1566  mp_m_axi_wstrb_converter_2->vector_out(m_axi_concat_wstrb_out_2);
1567  mp_M02_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_2_signal);
1568  mp_m_axi_wvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_2");
1569  mp_m_axi_wvalid_converter_2->scalar_in(m_m_axi_wvalid_converter_2_signal);
1570  mp_m_axi_wvalid_converter_2->vector_out(m_axi_concat_wvalid_out_2);
1571  mp_M02_AXI_transactor->WVALID(m_m_axi_wvalid_converter_2_signal);
1572  mp_m_axi_wready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_2");
1573  mp_m_axi_wready_converter_2->vector_in(m_axi_split_wready_out_2);
1574  mp_m_axi_wready_converter_2->scalar_out(m_m_axi_wready_converter_2_signal);
1575  mp_M02_AXI_transactor->WREADY(m_m_axi_wready_converter_2_signal);
1576  mp_m_axi_bresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_2");
1577  mp_m_axi_bresp_converter_2->vector_in(m_axi_split_bresp_out_2);
1578  mp_m_axi_bresp_converter_2->vector_out(m_m_axi_bresp_converter_2_signal);
1579  mp_M02_AXI_transactor->BRESP(m_m_axi_bresp_converter_2_signal);
1580  mp_m_axi_bvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_2");
1581  mp_m_axi_bvalid_converter_2->vector_in(m_axi_split_bvalid_out_2);
1582  mp_m_axi_bvalid_converter_2->scalar_out(m_m_axi_bvalid_converter_2_signal);
1583  mp_M02_AXI_transactor->BVALID(m_m_axi_bvalid_converter_2_signal);
1584  mp_m_axi_bready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_2");
1585  mp_m_axi_bready_converter_2->scalar_in(m_m_axi_bready_converter_2_signal);
1586  mp_m_axi_bready_converter_2->vector_out(m_axi_concat_bready_out_2);
1587  mp_M02_AXI_transactor->BREADY(m_m_axi_bready_converter_2_signal);
1588  mp_m_axi_araddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_2");
1589  mp_m_axi_araddr_converter_2->vector_in(m_m_axi_araddr_converter_2_signal);
1590  mp_m_axi_araddr_converter_2->vector_out(m_axi_concat_araddr_out_2);
1591  mp_M02_AXI_transactor->ARADDR(m_m_axi_araddr_converter_2_signal);
1592  mp_m_axi_arprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_2");
1593  mp_m_axi_arprot_converter_2->vector_in(m_m_axi_arprot_converter_2_signal);
1594  mp_m_axi_arprot_converter_2->vector_out(m_axi_concat_arprot_out_2);
1595  mp_M02_AXI_transactor->ARPROT(m_m_axi_arprot_converter_2_signal);
1596  mp_m_axi_arvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_2");
1597  mp_m_axi_arvalid_converter_2->scalar_in(m_m_axi_arvalid_converter_2_signal);
1598  mp_m_axi_arvalid_converter_2->vector_out(m_axi_concat_arvalid_out_2);
1599  mp_M02_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_2_signal);
1600  mp_m_axi_arready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_2");
1601  mp_m_axi_arready_converter_2->vector_in(m_axi_split_arready_out_2);
1602  mp_m_axi_arready_converter_2->scalar_out(m_m_axi_arready_converter_2_signal);
1603  mp_M02_AXI_transactor->ARREADY(m_m_axi_arready_converter_2_signal);
1604  mp_m_axi_rdata_converter_2 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_2");
1605  mp_m_axi_rdata_converter_2->vector_in(m_axi_split_rdata_out_2);
1606  mp_m_axi_rdata_converter_2->vector_out(m_m_axi_rdata_converter_2_signal);
1607  mp_M02_AXI_transactor->RDATA(m_m_axi_rdata_converter_2_signal);
1608  mp_m_axi_rresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_2");
1609  mp_m_axi_rresp_converter_2->vector_in(m_axi_split_rresp_out_2);
1610  mp_m_axi_rresp_converter_2->vector_out(m_m_axi_rresp_converter_2_signal);
1611  mp_M02_AXI_transactor->RRESP(m_m_axi_rresp_converter_2_signal);
1612  mp_m_axi_rvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_2");
1613  mp_m_axi_rvalid_converter_2->vector_in(m_axi_split_rvalid_out_2);
1614  mp_m_axi_rvalid_converter_2->scalar_out(m_m_axi_rvalid_converter_2_signal);
1615  mp_M02_AXI_transactor->RVALID(m_m_axi_rvalid_converter_2_signal);
1616  mp_m_axi_rready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_2");
1617  mp_m_axi_rready_converter_2->scalar_in(m_m_axi_rready_converter_2_signal);
1618  mp_m_axi_rready_converter_2->vector_out(m_axi_concat_rready_out_2);
1619  mp_M02_AXI_transactor->RREADY(m_m_axi_rready_converter_2_signal);
1620  mp_M02_AXI_transactor->CLK(aclk);
1621  mp_M02_AXI_transactor->RST(aresetn);
1622 
1623  // M02_AXI' transactor sockets
1624 
1625  mp_impl->initiator_2_rd_socket->bind(*(mp_M02_AXI_transactor->rd_socket));
1626  mp_impl->initiator_2_wr_socket->bind(*(mp_M02_AXI_transactor->wr_socket));
1627  }
1628  else
1629  {
1630  }
1631 
1632 }
1633 
1634 #endif // XM_SYSTEMC
1635 
1636 
1637 
1638 
1639 #ifdef RIVIERA
1640 design_1_xbar_0::design_1_xbar_0(const sc_core::sc_module_name& nm) : design_1_xbar_0_sc(nm), aclk("aclk"), aresetn("aresetn"), s_axi_awaddr("s_axi_awaddr"), s_axi_awprot("s_axi_awprot"), s_axi_awvalid("s_axi_awvalid"), s_axi_awready("s_axi_awready"), s_axi_wdata("s_axi_wdata"), s_axi_wstrb("s_axi_wstrb"), s_axi_wvalid("s_axi_wvalid"), s_axi_wready("s_axi_wready"), s_axi_bresp("s_axi_bresp"), s_axi_bvalid("s_axi_bvalid"), s_axi_bready("s_axi_bready"), s_axi_araddr("s_axi_araddr"), s_axi_arprot("s_axi_arprot"), s_axi_arvalid("s_axi_arvalid"), s_axi_arready("s_axi_arready"), s_axi_rdata("s_axi_rdata"), s_axi_rresp("s_axi_rresp"), s_axi_rvalid("s_axi_rvalid"), s_axi_rready("s_axi_rready"), m_axi_awaddr("m_axi_awaddr"), m_axi_awprot("m_axi_awprot"), m_axi_awvalid("m_axi_awvalid"), m_axi_awready("m_axi_awready"), m_axi_wdata("m_axi_wdata"), m_axi_wstrb("m_axi_wstrb"), m_axi_wvalid("m_axi_wvalid"), m_axi_wready("m_axi_wready"), m_axi_bresp("m_axi_bresp"), m_axi_bvalid("m_axi_bvalid"), m_axi_bready("m_axi_bready"), m_axi_araddr("m_axi_araddr"), m_axi_arprot("m_axi_arprot"), m_axi_arvalid("m_axi_arvalid"), m_axi_arready("m_axi_arready"), m_axi_rdata("m_axi_rdata"), m_axi_rresp("m_axi_rresp"), m_axi_rvalid("m_axi_rvalid"), m_axi_rready("m_axi_rready")
1641 {
1642 
1643  // initialize pins
1644  mp_impl->aclk(aclk);
1645  mp_impl->aresetn(aresetn);
1646 
1647  // initialize transactors
1648  mp_S00_AXI_transactor = NULL;
1649  mp_s_axi_awvalid_converter = NULL;
1650  mp_s_axi_awready_converter = NULL;
1651  mp_s_axi_wvalid_converter = NULL;
1652  mp_s_axi_wready_converter = NULL;
1653  mp_s_axi_bvalid_converter = NULL;
1654  mp_s_axi_bready_converter = NULL;
1655  mp_s_axi_arvalid_converter = NULL;
1656  mp_s_axi_arready_converter = NULL;
1657  mp_s_axi_rvalid_converter = NULL;
1658  mp_s_axi_rready_converter = NULL;
1659  mp_M00_AXI_transactor = NULL;
1660  mp_m_axi_awaddr_converter_0 = NULL;
1661  mp_m_axi_awprot_converter_0 = NULL;
1662  mp_m_axi_awvalid_converter_0 = NULL;
1663  mp_m_axi_awready_converter_0 = NULL;
1664  mp_m_axi_wdata_converter_0 = NULL;
1665  mp_m_axi_wstrb_converter_0 = NULL;
1666  mp_m_axi_wvalid_converter_0 = NULL;
1667  mp_m_axi_wready_converter_0 = NULL;
1668  mp_m_axi_bresp_converter_0 = NULL;
1669  mp_m_axi_bvalid_converter_0 = NULL;
1670  mp_m_axi_bready_converter_0 = NULL;
1671  mp_m_axi_araddr_converter_0 = NULL;
1672  mp_m_axi_arprot_converter_0 = NULL;
1673  mp_m_axi_arvalid_converter_0 = NULL;
1674  mp_m_axi_arready_converter_0 = NULL;
1675  mp_m_axi_rdata_converter_0 = NULL;
1676  mp_m_axi_rresp_converter_0 = NULL;
1677  mp_m_axi_rvalid_converter_0 = NULL;
1678  mp_m_axi_rready_converter_0 = NULL;
1679  mp_M01_AXI_transactor = NULL;
1680  mp_m_axi_awaddr_converter_1 = NULL;
1681  mp_m_axi_awprot_converter_1 = NULL;
1682  mp_m_axi_awvalid_converter_1 = NULL;
1683  mp_m_axi_awready_converter_1 = NULL;
1684  mp_m_axi_wdata_converter_1 = NULL;
1685  mp_m_axi_wstrb_converter_1 = NULL;
1686  mp_m_axi_wvalid_converter_1 = NULL;
1687  mp_m_axi_wready_converter_1 = NULL;
1688  mp_m_axi_bresp_converter_1 = NULL;
1689  mp_m_axi_bvalid_converter_1 = NULL;
1690  mp_m_axi_bready_converter_1 = NULL;
1691  mp_m_axi_araddr_converter_1 = NULL;
1692  mp_m_axi_arprot_converter_1 = NULL;
1693  mp_m_axi_arvalid_converter_1 = NULL;
1694  mp_m_axi_arready_converter_1 = NULL;
1695  mp_m_axi_rdata_converter_1 = NULL;
1696  mp_m_axi_rresp_converter_1 = NULL;
1697  mp_m_axi_rvalid_converter_1 = NULL;
1698  mp_m_axi_rready_converter_1 = NULL;
1699  mp_M02_AXI_transactor = NULL;
1700  mp_m_axi_awaddr_converter_2 = NULL;
1701  mp_m_axi_awprot_converter_2 = NULL;
1702  mp_m_axi_awvalid_converter_2 = NULL;
1703  mp_m_axi_awready_converter_2 = NULL;
1704  mp_m_axi_wdata_converter_2 = NULL;
1705  mp_m_axi_wstrb_converter_2 = NULL;
1706  mp_m_axi_wvalid_converter_2 = NULL;
1707  mp_m_axi_wready_converter_2 = NULL;
1708  mp_m_axi_bresp_converter_2 = NULL;
1709  mp_m_axi_bvalid_converter_2 = NULL;
1710  mp_m_axi_bready_converter_2 = NULL;
1711  mp_m_axi_araddr_converter_2 = NULL;
1712  mp_m_axi_arprot_converter_2 = NULL;
1713  mp_m_axi_arvalid_converter_2 = NULL;
1714  mp_m_axi_arready_converter_2 = NULL;
1715  mp_m_axi_rdata_converter_2 = NULL;
1716  mp_m_axi_rresp_converter_2 = NULL;
1717  mp_m_axi_rvalid_converter_2 = NULL;
1718  mp_m_axi_rready_converter_2 = NULL;
1719 
1720  // initialize junctures
1721  mp_m_axi_concat_araddr = NULL;
1722  mp_m_axi_concat_arprot = NULL;
1723  mp_m_axi_concat_arvalid = NULL;
1724  mp_m_axi_concat_awaddr = NULL;
1725  mp_m_axi_concat_awprot = NULL;
1726  mp_m_axi_concat_awvalid = NULL;
1727  mp_m_axi_concat_bready = NULL;
1728  mp_m_axi_concat_rready = NULL;
1729  mp_m_axi_concat_wdata = NULL;
1730  mp_m_axi_concat_wstrb = NULL;
1731  mp_m_axi_concat_wvalid = NULL;
1732  mp_m_axi_split_arready = NULL;
1733  mp_m_axi_split_awready = NULL;
1734  mp_m_axi_split_bresp = NULL;
1735  mp_m_axi_split_bvalid = NULL;
1736  mp_m_axi_split_rdata = NULL;
1737  mp_m_axi_split_rresp = NULL;
1738  mp_m_axi_split_rvalid = NULL;
1739  mp_m_axi_split_wready = NULL;
1740  mp_m_axi_concat_awaddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_awaddr");
1741  mp_m_axi_concat_awaddr->in_port[0](m_axi_concat_awaddr_out_0);
1742  mp_m_axi_concat_awaddr->out_port(m_axi_awaddr);
1743  mp_m_axi_concat_awaddr->offset_port(0, 0);
1744  mp_m_axi_concat_awprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_awprot");
1745  mp_m_axi_concat_awprot->in_port[0](m_axi_concat_awprot_out_0);
1746  mp_m_axi_concat_awprot->out_port(m_axi_awprot);
1747  mp_m_axi_concat_awprot->offset_port(0, 0);
1748  mp_m_axi_concat_awvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_awvalid");
1749  mp_m_axi_concat_awvalid->in_port[0](m_axi_concat_awvalid_out_0);
1750  mp_m_axi_concat_awvalid->out_port(m_axi_awvalid);
1751  mp_m_axi_concat_awvalid->offset_port(0, 0);
1752  mp_m_axi_split_awready = new xsc::xsc_split<3, 3>("m_axi_split_awready");
1753  mp_m_axi_split_awready->in_port(m_axi_awready);
1754  mp_m_axi_split_awready->out_port[0](m_axi_split_awready_out_0);
1755  mp_m_axi_split_awready->add_mask(0,1,0);
1756  mp_m_axi_concat_wdata = new xsc::xsc_concatenator<96, 3>("m_axi_concat_wdata");
1757  mp_m_axi_concat_wdata->in_port[0](m_axi_concat_wdata_out_0);
1758  mp_m_axi_concat_wdata->out_port(m_axi_wdata);
1759  mp_m_axi_concat_wdata->offset_port(0, 0);
1760  mp_m_axi_concat_wstrb = new xsc::xsc_concatenator<12, 3>("m_axi_concat_wstrb");
1761  mp_m_axi_concat_wstrb->in_port[0](m_axi_concat_wstrb_out_0);
1762  mp_m_axi_concat_wstrb->out_port(m_axi_wstrb);
1763  mp_m_axi_concat_wstrb->offset_port(0, 0);
1764  mp_m_axi_concat_wvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_wvalid");
1765  mp_m_axi_concat_wvalid->in_port[0](m_axi_concat_wvalid_out_0);
1766  mp_m_axi_concat_wvalid->out_port(m_axi_wvalid);
1767  mp_m_axi_concat_wvalid->offset_port(0, 0);
1768  mp_m_axi_split_wready = new xsc::xsc_split<3, 3>("m_axi_split_wready");
1769  mp_m_axi_split_wready->in_port(m_axi_wready);
1770  mp_m_axi_split_wready->out_port[0](m_axi_split_wready_out_0);
1771  mp_m_axi_split_wready->add_mask(0,1,0);
1772  mp_m_axi_split_bresp = new xsc::xsc_split<6, 3>("m_axi_split_bresp");
1773  mp_m_axi_split_bresp->in_port(m_axi_bresp);
1774  mp_m_axi_split_bresp->out_port[0](m_axi_split_bresp_out_0);
1775  mp_m_axi_split_bresp->add_mask(0,2,0);
1776  mp_m_axi_split_bvalid = new xsc::xsc_split<3, 3>("m_axi_split_bvalid");
1777  mp_m_axi_split_bvalid->in_port(m_axi_bvalid);
1778  mp_m_axi_split_bvalid->out_port[0](m_axi_split_bvalid_out_0);
1779  mp_m_axi_split_bvalid->add_mask(0,1,0);
1780  mp_m_axi_concat_bready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_bready");
1781  mp_m_axi_concat_bready->in_port[0](m_axi_concat_bready_out_0);
1782  mp_m_axi_concat_bready->out_port(m_axi_bready);
1783  mp_m_axi_concat_bready->offset_port(0, 0);
1784  mp_m_axi_concat_araddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_araddr");
1785  mp_m_axi_concat_araddr->in_port[0](m_axi_concat_araddr_out_0);
1786  mp_m_axi_concat_araddr->out_port(m_axi_araddr);
1787  mp_m_axi_concat_araddr->offset_port(0, 0);
1788  mp_m_axi_concat_arprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_arprot");
1789  mp_m_axi_concat_arprot->in_port[0](m_axi_concat_arprot_out_0);
1790  mp_m_axi_concat_arprot->out_port(m_axi_arprot);
1791  mp_m_axi_concat_arprot->offset_port(0, 0);
1792  mp_m_axi_concat_arvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_arvalid");
1793  mp_m_axi_concat_arvalid->in_port[0](m_axi_concat_arvalid_out_0);
1794  mp_m_axi_concat_arvalid->out_port(m_axi_arvalid);
1795  mp_m_axi_concat_arvalid->offset_port(0, 0);
1796  mp_m_axi_split_arready = new xsc::xsc_split<3, 3>("m_axi_split_arready");
1797  mp_m_axi_split_arready->in_port(m_axi_arready);
1798  mp_m_axi_split_arready->out_port[0](m_axi_split_arready_out_0);
1799  mp_m_axi_split_arready->add_mask(0,1,0);
1800  mp_m_axi_split_rdata = new xsc::xsc_split<96, 3>("m_axi_split_rdata");
1801  mp_m_axi_split_rdata->in_port(m_axi_rdata);
1802  mp_m_axi_split_rdata->out_port[0](m_axi_split_rdata_out_0);
1803  mp_m_axi_split_rdata->add_mask(0,32,0);
1804  mp_m_axi_split_rresp = new xsc::xsc_split<6, 3>("m_axi_split_rresp");
1805  mp_m_axi_split_rresp->in_port(m_axi_rresp);
1806  mp_m_axi_split_rresp->out_port[0](m_axi_split_rresp_out_0);
1807  mp_m_axi_split_rresp->add_mask(0,2,0);
1808  mp_m_axi_split_rvalid = new xsc::xsc_split<3, 3>("m_axi_split_rvalid");
1809  mp_m_axi_split_rvalid->in_port(m_axi_rvalid);
1810  mp_m_axi_split_rvalid->out_port[0](m_axi_split_rvalid_out_0);
1811  mp_m_axi_split_rvalid->add_mask(0,1,0);
1812  mp_m_axi_concat_rready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_rready");
1813  mp_m_axi_concat_rready->in_port[0](m_axi_concat_rready_out_0);
1814  mp_m_axi_concat_rready->out_port(m_axi_rready);
1815  mp_m_axi_concat_rready->offset_port(0, 0);
1816  mp_m_axi_concat_awaddr->in_port[1](m_axi_concat_awaddr_out_1);
1817  mp_m_axi_concat_awaddr->offset_port(1, 32);
1818  mp_m_axi_concat_awprot->in_port[1](m_axi_concat_awprot_out_1);
1819  mp_m_axi_concat_awprot->offset_port(1, 3);
1820  mp_m_axi_concat_awvalid->in_port[1](m_axi_concat_awvalid_out_1);
1821  mp_m_axi_concat_awvalid->offset_port(1, 1);
1822 
1823  mp_m_axi_split_awready->out_port[1](m_axi_split_awready_out_1);
1824  mp_m_axi_split_awready->add_mask(1,2,1);
1825  mp_m_axi_concat_wdata->in_port[1](m_axi_concat_wdata_out_1);
1826  mp_m_axi_concat_wdata->offset_port(1, 32);
1827  mp_m_axi_concat_wstrb->in_port[1](m_axi_concat_wstrb_out_1);
1828  mp_m_axi_concat_wstrb->offset_port(1, 4);
1829  mp_m_axi_concat_wvalid->in_port[1](m_axi_concat_wvalid_out_1);
1830  mp_m_axi_concat_wvalid->offset_port(1, 1);
1831 
1832  mp_m_axi_split_wready->out_port[1](m_axi_split_wready_out_1);
1833  mp_m_axi_split_wready->add_mask(1,2,1);
1834 
1835  mp_m_axi_split_bresp->out_port[1](m_axi_split_bresp_out_1);
1836  mp_m_axi_split_bresp->add_mask(1,4,2);
1837 
1838  mp_m_axi_split_bvalid->out_port[1](m_axi_split_bvalid_out_1);
1839  mp_m_axi_split_bvalid->add_mask(1,2,1);
1840  mp_m_axi_concat_bready->in_port[1](m_axi_concat_bready_out_1);
1841  mp_m_axi_concat_bready->offset_port(1, 1);
1842  mp_m_axi_concat_araddr->in_port[1](m_axi_concat_araddr_out_1);
1843  mp_m_axi_concat_araddr->offset_port(1, 32);
1844  mp_m_axi_concat_arprot->in_port[1](m_axi_concat_arprot_out_1);
1845  mp_m_axi_concat_arprot->offset_port(1, 3);
1846  mp_m_axi_concat_arvalid->in_port[1](m_axi_concat_arvalid_out_1);
1847  mp_m_axi_concat_arvalid->offset_port(1, 1);
1848 
1849  mp_m_axi_split_arready->out_port[1](m_axi_split_arready_out_1);
1850  mp_m_axi_split_arready->add_mask(1,2,1);
1851 
1852  mp_m_axi_split_rdata->out_port[1](m_axi_split_rdata_out_1);
1853  mp_m_axi_split_rdata->add_mask(1,64,32);
1854 
1855  mp_m_axi_split_rresp->out_port[1](m_axi_split_rresp_out_1);
1856  mp_m_axi_split_rresp->add_mask(1,4,2);
1857 
1858  mp_m_axi_split_rvalid->out_port[1](m_axi_split_rvalid_out_1);
1859  mp_m_axi_split_rvalid->add_mask(1,2,1);
1860  mp_m_axi_concat_rready->in_port[1](m_axi_concat_rready_out_1);
1861  mp_m_axi_concat_rready->offset_port(1, 1);
1862  mp_m_axi_concat_awaddr->in_port[2](m_axi_concat_awaddr_out_2);
1863  mp_m_axi_concat_awaddr->offset_port(2, 64);
1864  mp_m_axi_concat_awprot->in_port[2](m_axi_concat_awprot_out_2);
1865  mp_m_axi_concat_awprot->offset_port(2, 6);
1866  mp_m_axi_concat_awvalid->in_port[2](m_axi_concat_awvalid_out_2);
1867  mp_m_axi_concat_awvalid->offset_port(2, 2);
1868 
1869  mp_m_axi_split_awready->out_port[2](m_axi_split_awready_out_2);
1870  mp_m_axi_split_awready->add_mask(2,3,2);
1871  mp_m_axi_concat_wdata->in_port[2](m_axi_concat_wdata_out_2);
1872  mp_m_axi_concat_wdata->offset_port(2, 64);
1873  mp_m_axi_concat_wstrb->in_port[2](m_axi_concat_wstrb_out_2);
1874  mp_m_axi_concat_wstrb->offset_port(2, 8);
1875  mp_m_axi_concat_wvalid->in_port[2](m_axi_concat_wvalid_out_2);
1876  mp_m_axi_concat_wvalid->offset_port(2, 2);
1877 
1878  mp_m_axi_split_wready->out_port[2](m_axi_split_wready_out_2);
1879  mp_m_axi_split_wready->add_mask(2,3,2);
1880 
1881  mp_m_axi_split_bresp->out_port[2](m_axi_split_bresp_out_2);
1882  mp_m_axi_split_bresp->add_mask(2,6,4);
1883 
1884  mp_m_axi_split_bvalid->out_port[2](m_axi_split_bvalid_out_2);
1885  mp_m_axi_split_bvalid->add_mask(2,3,2);
1886  mp_m_axi_concat_bready->in_port[2](m_axi_concat_bready_out_2);
1887  mp_m_axi_concat_bready->offset_port(2, 2);
1888  mp_m_axi_concat_araddr->in_port[2](m_axi_concat_araddr_out_2);
1889  mp_m_axi_concat_araddr->offset_port(2, 64);
1890  mp_m_axi_concat_arprot->in_port[2](m_axi_concat_arprot_out_2);
1891  mp_m_axi_concat_arprot->offset_port(2, 6);
1892  mp_m_axi_concat_arvalid->in_port[2](m_axi_concat_arvalid_out_2);
1893  mp_m_axi_concat_arvalid->offset_port(2, 2);
1894 
1895  mp_m_axi_split_arready->out_port[2](m_axi_split_arready_out_2);
1896  mp_m_axi_split_arready->add_mask(2,3,2);
1897 
1898  mp_m_axi_split_rdata->out_port[2](m_axi_split_rdata_out_2);
1899  mp_m_axi_split_rdata->add_mask(2,96,64);
1900 
1901  mp_m_axi_split_rresp->out_port[2](m_axi_split_rresp_out_2);
1902  mp_m_axi_split_rresp->add_mask(2,6,4);
1903 
1904  mp_m_axi_split_rvalid->out_port[2](m_axi_split_rvalid_out_2);
1905  mp_m_axi_split_rvalid->add_mask(2,3,2);
1906  mp_m_axi_concat_rready->in_port[2](m_axi_concat_rready_out_2);
1907  mp_m_axi_concat_rready->offset_port(2, 2);
1908 
1909  // initialize socket stubs
1910 
1911 }
1912 
1913 void design_1_xbar_0::before_end_of_elaboration()
1914 {
1915  // configure 'S00_AXI' transactor
1916 
1917  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "S00_AXI_TLM_MODE") != 1)
1918  {
1919  // Instantiate Socket Stubs
1920 
1921  // 'S00_AXI' transactor parameters
1922  xsc::common_cpp::properties S00_AXI_transactor_param_props;
1923  S00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
1924  S00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
1925  S00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
1926  S00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
1927  S00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
1928  S00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
1929  S00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
1930  S00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
1931  S00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
1932  S00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
1933  S00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
1934  S00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
1935  S00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
1936  S00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
1937  S00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
1938  S00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
1939  S00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
1940  S00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
1941  S00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
1942  S00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "8");
1943  S00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "8");
1944  S00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
1945  S00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "4");
1946  S00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "4");
1947  S00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
1948  S00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
1949  S00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
1950  S00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
1951  S00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
1952  S00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
1953  S00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
1954  S00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
1955 
1956  mp_S00_AXI_transactor = new xtlm::xaximm_pin2xtlm_t<32,32,1,1,1,1,1,1>("S00_AXI_transactor", S00_AXI_transactor_param_props);
1957 
1958  // S00_AXI' transactor ports
1959 
1960  mp_S00_AXI_transactor->AWADDR(s_axi_awaddr);
1961  mp_S00_AXI_transactor->AWPROT(s_axi_awprot);
1962  mp_s_axi_awvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_awvalid_converter");
1963  mp_s_axi_awvalid_converter->vector_in(s_axi_awvalid);
1964  mp_s_axi_awvalid_converter->scalar_out(m_s_axi_awvalid_converter_signal);
1965  mp_S00_AXI_transactor->AWVALID(m_s_axi_awvalid_converter_signal);
1966  mp_s_axi_awready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_awready_converter");
1967  mp_s_axi_awready_converter->scalar_in(m_s_axi_awready_converter_signal);
1968  mp_s_axi_awready_converter->vector_out(s_axi_awready);
1969  mp_S00_AXI_transactor->AWREADY(m_s_axi_awready_converter_signal);
1970  mp_S00_AXI_transactor->WDATA(s_axi_wdata);
1971  mp_S00_AXI_transactor->WSTRB(s_axi_wstrb);
1972  mp_s_axi_wvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_wvalid_converter");
1973  mp_s_axi_wvalid_converter->vector_in(s_axi_wvalid);
1974  mp_s_axi_wvalid_converter->scalar_out(m_s_axi_wvalid_converter_signal);
1975  mp_S00_AXI_transactor->WVALID(m_s_axi_wvalid_converter_signal);
1976  mp_s_axi_wready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_wready_converter");
1977  mp_s_axi_wready_converter->scalar_in(m_s_axi_wready_converter_signal);
1978  mp_s_axi_wready_converter->vector_out(s_axi_wready);
1979  mp_S00_AXI_transactor->WREADY(m_s_axi_wready_converter_signal);
1980  mp_S00_AXI_transactor->BRESP(s_axi_bresp);
1981  mp_s_axi_bvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_bvalid_converter");
1982  mp_s_axi_bvalid_converter->scalar_in(m_s_axi_bvalid_converter_signal);
1983  mp_s_axi_bvalid_converter->vector_out(s_axi_bvalid);
1984  mp_S00_AXI_transactor->BVALID(m_s_axi_bvalid_converter_signal);
1985  mp_s_axi_bready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_bready_converter");
1986  mp_s_axi_bready_converter->vector_in(s_axi_bready);
1987  mp_s_axi_bready_converter->scalar_out(m_s_axi_bready_converter_signal);
1988  mp_S00_AXI_transactor->BREADY(m_s_axi_bready_converter_signal);
1989  mp_S00_AXI_transactor->ARADDR(s_axi_araddr);
1990  mp_S00_AXI_transactor->ARPROT(s_axi_arprot);
1991  mp_s_axi_arvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_arvalid_converter");
1992  mp_s_axi_arvalid_converter->vector_in(s_axi_arvalid);
1993  mp_s_axi_arvalid_converter->scalar_out(m_s_axi_arvalid_converter_signal);
1994  mp_S00_AXI_transactor->ARVALID(m_s_axi_arvalid_converter_signal);
1995  mp_s_axi_arready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_arready_converter");
1996  mp_s_axi_arready_converter->scalar_in(m_s_axi_arready_converter_signal);
1997  mp_s_axi_arready_converter->vector_out(s_axi_arready);
1998  mp_S00_AXI_transactor->ARREADY(m_s_axi_arready_converter_signal);
1999  mp_S00_AXI_transactor->RDATA(s_axi_rdata);
2000  mp_S00_AXI_transactor->RRESP(s_axi_rresp);
2001  mp_s_axi_rvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_rvalid_converter");
2002  mp_s_axi_rvalid_converter->scalar_in(m_s_axi_rvalid_converter_signal);
2003  mp_s_axi_rvalid_converter->vector_out(s_axi_rvalid);
2004  mp_S00_AXI_transactor->RVALID(m_s_axi_rvalid_converter_signal);
2005  mp_s_axi_rready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_rready_converter");
2006  mp_s_axi_rready_converter->vector_in(s_axi_rready);
2007  mp_s_axi_rready_converter->scalar_out(m_s_axi_rready_converter_signal);
2008  mp_S00_AXI_transactor->RREADY(m_s_axi_rready_converter_signal);
2009  mp_S00_AXI_transactor->CLK(aclk);
2010  mp_S00_AXI_transactor->RST(aresetn);
2011 
2012  // S00_AXI' transactor sockets
2013 
2014  mp_impl->target_0_rd_socket->bind(*(mp_S00_AXI_transactor->rd_socket));
2015  mp_impl->target_0_wr_socket->bind(*(mp_S00_AXI_transactor->wr_socket));
2016  }
2017  else
2018  {
2019  }
2020 
2021  // configure 'M00_AXI' transactor
2022 
2023  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M00_AXI_TLM_MODE") != 1)
2024  {
2025  // Instantiate Socket Stubs
2026 
2027  // 'M00_AXI' transactor parameters
2028  xsc::common_cpp::properties M00_AXI_transactor_param_props;
2029  M00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2030  M00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2031  M00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2032  M00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2033  M00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2034  M00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2035  M00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2036  M00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2037  M00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2038  M00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2039  M00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2040  M00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2041  M00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2042  M00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2043  M00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2044  M00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2045  M00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2046  M00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2047  M00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2048  M00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
2049  M00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
2050  M00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2051  M00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
2052  M00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
2053  M00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2054  M00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2055  M00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2056  M00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2057  M00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2058  M00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2059  M00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
2060  M00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
2061 
2062  mp_M00_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M00_AXI_transactor", M00_AXI_transactor_param_props);
2063 
2064  // M00_AXI' transactor ports
2065 
2066  mp_m_axi_awaddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_0");
2067  mp_m_axi_awaddr_converter_0->vector_in(m_m_axi_awaddr_converter_0_signal);
2068  mp_m_axi_awaddr_converter_0->vector_out(m_axi_concat_awaddr_out_0);
2069  mp_M00_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_0_signal);
2070  mp_m_axi_awprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_0");
2071  mp_m_axi_awprot_converter_0->vector_in(m_m_axi_awprot_converter_0_signal);
2072  mp_m_axi_awprot_converter_0->vector_out(m_axi_concat_awprot_out_0);
2073  mp_M00_AXI_transactor->AWPROT(m_m_axi_awprot_converter_0_signal);
2074  mp_m_axi_awvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_0");
2075  mp_m_axi_awvalid_converter_0->scalar_in(m_m_axi_awvalid_converter_0_signal);
2076  mp_m_axi_awvalid_converter_0->vector_out(m_axi_concat_awvalid_out_0);
2077  mp_M00_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_0_signal);
2078  mp_m_axi_awready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_0");
2079  mp_m_axi_awready_converter_0->vector_in(m_axi_split_awready_out_0);
2080  mp_m_axi_awready_converter_0->scalar_out(m_m_axi_awready_converter_0_signal);
2081  mp_M00_AXI_transactor->AWREADY(m_m_axi_awready_converter_0_signal);
2082  mp_m_axi_wdata_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_0");
2083  mp_m_axi_wdata_converter_0->vector_in(m_m_axi_wdata_converter_0_signal);
2084  mp_m_axi_wdata_converter_0->vector_out(m_axi_concat_wdata_out_0);
2085  mp_M00_AXI_transactor->WDATA(m_m_axi_wdata_converter_0_signal);
2086  mp_m_axi_wstrb_converter_0 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_0");
2087  mp_m_axi_wstrb_converter_0->vector_in(m_m_axi_wstrb_converter_0_signal);
2088  mp_m_axi_wstrb_converter_0->vector_out(m_axi_concat_wstrb_out_0);
2089  mp_M00_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_0_signal);
2090  mp_m_axi_wvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_0");
2091  mp_m_axi_wvalid_converter_0->scalar_in(m_m_axi_wvalid_converter_0_signal);
2092  mp_m_axi_wvalid_converter_0->vector_out(m_axi_concat_wvalid_out_0);
2093  mp_M00_AXI_transactor->WVALID(m_m_axi_wvalid_converter_0_signal);
2094  mp_m_axi_wready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_0");
2095  mp_m_axi_wready_converter_0->vector_in(m_axi_split_wready_out_0);
2096  mp_m_axi_wready_converter_0->scalar_out(m_m_axi_wready_converter_0_signal);
2097  mp_M00_AXI_transactor->WREADY(m_m_axi_wready_converter_0_signal);
2098  mp_m_axi_bresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_0");
2099  mp_m_axi_bresp_converter_0->vector_in(m_axi_split_bresp_out_0);
2100  mp_m_axi_bresp_converter_0->vector_out(m_m_axi_bresp_converter_0_signal);
2101  mp_M00_AXI_transactor->BRESP(m_m_axi_bresp_converter_0_signal);
2102  mp_m_axi_bvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_0");
2103  mp_m_axi_bvalid_converter_0->vector_in(m_axi_split_bvalid_out_0);
2104  mp_m_axi_bvalid_converter_0->scalar_out(m_m_axi_bvalid_converter_0_signal);
2105  mp_M00_AXI_transactor->BVALID(m_m_axi_bvalid_converter_0_signal);
2106  mp_m_axi_bready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_0");
2107  mp_m_axi_bready_converter_0->scalar_in(m_m_axi_bready_converter_0_signal);
2108  mp_m_axi_bready_converter_0->vector_out(m_axi_concat_bready_out_0);
2109  mp_M00_AXI_transactor->BREADY(m_m_axi_bready_converter_0_signal);
2110  mp_m_axi_araddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_0");
2111  mp_m_axi_araddr_converter_0->vector_in(m_m_axi_araddr_converter_0_signal);
2112  mp_m_axi_araddr_converter_0->vector_out(m_axi_concat_araddr_out_0);
2113  mp_M00_AXI_transactor->ARADDR(m_m_axi_araddr_converter_0_signal);
2114  mp_m_axi_arprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_0");
2115  mp_m_axi_arprot_converter_0->vector_in(m_m_axi_arprot_converter_0_signal);
2116  mp_m_axi_arprot_converter_0->vector_out(m_axi_concat_arprot_out_0);
2117  mp_M00_AXI_transactor->ARPROT(m_m_axi_arprot_converter_0_signal);
2118  mp_m_axi_arvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_0");
2119  mp_m_axi_arvalid_converter_0->scalar_in(m_m_axi_arvalid_converter_0_signal);
2120  mp_m_axi_arvalid_converter_0->vector_out(m_axi_concat_arvalid_out_0);
2121  mp_M00_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_0_signal);
2122  mp_m_axi_arready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_0");
2123  mp_m_axi_arready_converter_0->vector_in(m_axi_split_arready_out_0);
2124  mp_m_axi_arready_converter_0->scalar_out(m_m_axi_arready_converter_0_signal);
2125  mp_M00_AXI_transactor->ARREADY(m_m_axi_arready_converter_0_signal);
2126  mp_m_axi_rdata_converter_0 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_0");
2127  mp_m_axi_rdata_converter_0->vector_in(m_axi_split_rdata_out_0);
2128  mp_m_axi_rdata_converter_0->vector_out(m_m_axi_rdata_converter_0_signal);
2129  mp_M00_AXI_transactor->RDATA(m_m_axi_rdata_converter_0_signal);
2130  mp_m_axi_rresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_0");
2131  mp_m_axi_rresp_converter_0->vector_in(m_axi_split_rresp_out_0);
2132  mp_m_axi_rresp_converter_0->vector_out(m_m_axi_rresp_converter_0_signal);
2133  mp_M00_AXI_transactor->RRESP(m_m_axi_rresp_converter_0_signal);
2134  mp_m_axi_rvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_0");
2135  mp_m_axi_rvalid_converter_0->vector_in(m_axi_split_rvalid_out_0);
2136  mp_m_axi_rvalid_converter_0->scalar_out(m_m_axi_rvalid_converter_0_signal);
2137  mp_M00_AXI_transactor->RVALID(m_m_axi_rvalid_converter_0_signal);
2138  mp_m_axi_rready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_0");
2139  mp_m_axi_rready_converter_0->scalar_in(m_m_axi_rready_converter_0_signal);
2140  mp_m_axi_rready_converter_0->vector_out(m_axi_concat_rready_out_0);
2141  mp_M00_AXI_transactor->RREADY(m_m_axi_rready_converter_0_signal);
2142  mp_M00_AXI_transactor->CLK(aclk);
2143  mp_M00_AXI_transactor->RST(aresetn);
2144 
2145  // M00_AXI' transactor sockets
2146 
2147  mp_impl->initiator_0_rd_socket->bind(*(mp_M00_AXI_transactor->rd_socket));
2148  mp_impl->initiator_0_wr_socket->bind(*(mp_M00_AXI_transactor->wr_socket));
2149  }
2150  else
2151  {
2152  }
2153 
2154  // configure 'M01_AXI' transactor
2155 
2156  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M01_AXI_TLM_MODE") != 1)
2157  {
2158  // Instantiate Socket Stubs
2159 
2160  // 'M01_AXI' transactor parameters
2161  xsc::common_cpp::properties M01_AXI_transactor_param_props;
2162  M01_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2163  M01_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2164  M01_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2165  M01_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2166  M01_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2167  M01_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2168  M01_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2169  M01_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2170  M01_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2171  M01_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2172  M01_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2173  M01_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2174  M01_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2175  M01_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2176  M01_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2177  M01_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2178  M01_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2179  M01_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2180  M01_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2181  M01_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
2182  M01_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
2183  M01_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2184  M01_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
2185  M01_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
2186  M01_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2187  M01_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2188  M01_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2189  M01_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2190  M01_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2191  M01_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2192  M01_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
2193  M01_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
2194 
2195  mp_M01_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M01_AXI_transactor", M01_AXI_transactor_param_props);
2196 
2197  // M01_AXI' transactor ports
2198 
2199  mp_m_axi_awaddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_1");
2200  mp_m_axi_awaddr_converter_1->vector_in(m_m_axi_awaddr_converter_1_signal);
2201  mp_m_axi_awaddr_converter_1->vector_out(m_axi_concat_awaddr_out_1);
2202  mp_M01_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_1_signal);
2203  mp_m_axi_awprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_1");
2204  mp_m_axi_awprot_converter_1->vector_in(m_m_axi_awprot_converter_1_signal);
2205  mp_m_axi_awprot_converter_1->vector_out(m_axi_concat_awprot_out_1);
2206  mp_M01_AXI_transactor->AWPROT(m_m_axi_awprot_converter_1_signal);
2207  mp_m_axi_awvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_1");
2208  mp_m_axi_awvalid_converter_1->scalar_in(m_m_axi_awvalid_converter_1_signal);
2209  mp_m_axi_awvalid_converter_1->vector_out(m_axi_concat_awvalid_out_1);
2210  mp_M01_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_1_signal);
2211  mp_m_axi_awready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_1");
2212  mp_m_axi_awready_converter_1->vector_in(m_axi_split_awready_out_1);
2213  mp_m_axi_awready_converter_1->scalar_out(m_m_axi_awready_converter_1_signal);
2214  mp_M01_AXI_transactor->AWREADY(m_m_axi_awready_converter_1_signal);
2215  mp_m_axi_wdata_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_1");
2216  mp_m_axi_wdata_converter_1->vector_in(m_m_axi_wdata_converter_1_signal);
2217  mp_m_axi_wdata_converter_1->vector_out(m_axi_concat_wdata_out_1);
2218  mp_M01_AXI_transactor->WDATA(m_m_axi_wdata_converter_1_signal);
2219  mp_m_axi_wstrb_converter_1 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_1");
2220  mp_m_axi_wstrb_converter_1->vector_in(m_m_axi_wstrb_converter_1_signal);
2221  mp_m_axi_wstrb_converter_1->vector_out(m_axi_concat_wstrb_out_1);
2222  mp_M01_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_1_signal);
2223  mp_m_axi_wvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_1");
2224  mp_m_axi_wvalid_converter_1->scalar_in(m_m_axi_wvalid_converter_1_signal);
2225  mp_m_axi_wvalid_converter_1->vector_out(m_axi_concat_wvalid_out_1);
2226  mp_M01_AXI_transactor->WVALID(m_m_axi_wvalid_converter_1_signal);
2227  mp_m_axi_wready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_1");
2228  mp_m_axi_wready_converter_1->vector_in(m_axi_split_wready_out_1);
2229  mp_m_axi_wready_converter_1->scalar_out(m_m_axi_wready_converter_1_signal);
2230  mp_M01_AXI_transactor->WREADY(m_m_axi_wready_converter_1_signal);
2231  mp_m_axi_bresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_1");
2232  mp_m_axi_bresp_converter_1->vector_in(m_axi_split_bresp_out_1);
2233  mp_m_axi_bresp_converter_1->vector_out(m_m_axi_bresp_converter_1_signal);
2234  mp_M01_AXI_transactor->BRESP(m_m_axi_bresp_converter_1_signal);
2235  mp_m_axi_bvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_1");
2236  mp_m_axi_bvalid_converter_1->vector_in(m_axi_split_bvalid_out_1);
2237  mp_m_axi_bvalid_converter_1->scalar_out(m_m_axi_bvalid_converter_1_signal);
2238  mp_M01_AXI_transactor->BVALID(m_m_axi_bvalid_converter_1_signal);
2239  mp_m_axi_bready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_1");
2240  mp_m_axi_bready_converter_1->scalar_in(m_m_axi_bready_converter_1_signal);
2241  mp_m_axi_bready_converter_1->vector_out(m_axi_concat_bready_out_1);
2242  mp_M01_AXI_transactor->BREADY(m_m_axi_bready_converter_1_signal);
2243  mp_m_axi_araddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_1");
2244  mp_m_axi_araddr_converter_1->vector_in(m_m_axi_araddr_converter_1_signal);
2245  mp_m_axi_araddr_converter_1->vector_out(m_axi_concat_araddr_out_1);
2246  mp_M01_AXI_transactor->ARADDR(m_m_axi_araddr_converter_1_signal);
2247  mp_m_axi_arprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_1");
2248  mp_m_axi_arprot_converter_1->vector_in(m_m_axi_arprot_converter_1_signal);
2249  mp_m_axi_arprot_converter_1->vector_out(m_axi_concat_arprot_out_1);
2250  mp_M01_AXI_transactor->ARPROT(m_m_axi_arprot_converter_1_signal);
2251  mp_m_axi_arvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_1");
2252  mp_m_axi_arvalid_converter_1->scalar_in(m_m_axi_arvalid_converter_1_signal);
2253  mp_m_axi_arvalid_converter_1->vector_out(m_axi_concat_arvalid_out_1);
2254  mp_M01_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_1_signal);
2255  mp_m_axi_arready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_1");
2256  mp_m_axi_arready_converter_1->vector_in(m_axi_split_arready_out_1);
2257  mp_m_axi_arready_converter_1->scalar_out(m_m_axi_arready_converter_1_signal);
2258  mp_M01_AXI_transactor->ARREADY(m_m_axi_arready_converter_1_signal);
2259  mp_m_axi_rdata_converter_1 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_1");
2260  mp_m_axi_rdata_converter_1->vector_in(m_axi_split_rdata_out_1);
2261  mp_m_axi_rdata_converter_1->vector_out(m_m_axi_rdata_converter_1_signal);
2262  mp_M01_AXI_transactor->RDATA(m_m_axi_rdata_converter_1_signal);
2263  mp_m_axi_rresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_1");
2264  mp_m_axi_rresp_converter_1->vector_in(m_axi_split_rresp_out_1);
2265  mp_m_axi_rresp_converter_1->vector_out(m_m_axi_rresp_converter_1_signal);
2266  mp_M01_AXI_transactor->RRESP(m_m_axi_rresp_converter_1_signal);
2267  mp_m_axi_rvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_1");
2268  mp_m_axi_rvalid_converter_1->vector_in(m_axi_split_rvalid_out_1);
2269  mp_m_axi_rvalid_converter_1->scalar_out(m_m_axi_rvalid_converter_1_signal);
2270  mp_M01_AXI_transactor->RVALID(m_m_axi_rvalid_converter_1_signal);
2271  mp_m_axi_rready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_1");
2272  mp_m_axi_rready_converter_1->scalar_in(m_m_axi_rready_converter_1_signal);
2273  mp_m_axi_rready_converter_1->vector_out(m_axi_concat_rready_out_1);
2274  mp_M01_AXI_transactor->RREADY(m_m_axi_rready_converter_1_signal);
2275  mp_M01_AXI_transactor->CLK(aclk);
2276  mp_M01_AXI_transactor->RST(aresetn);
2277 
2278  // M01_AXI' transactor sockets
2279 
2280  mp_impl->initiator_1_rd_socket->bind(*(mp_M01_AXI_transactor->rd_socket));
2281  mp_impl->initiator_1_wr_socket->bind(*(mp_M01_AXI_transactor->wr_socket));
2282  }
2283  else
2284  {
2285  }
2286 
2287  // configure 'M02_AXI' transactor
2288 
2289  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M02_AXI_TLM_MODE") != 1)
2290  {
2291  // Instantiate Socket Stubs
2292 
2293  // 'M02_AXI' transactor parameters
2294  xsc::common_cpp::properties M02_AXI_transactor_param_props;
2295  M02_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2296  M02_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2297  M02_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2298  M02_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2299  M02_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2300  M02_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2301  M02_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2302  M02_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2303  M02_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2304  M02_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2305  M02_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2306  M02_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2307  M02_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2308  M02_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2309  M02_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2310  M02_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2311  M02_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2312  M02_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2313  M02_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2314  M02_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
2315  M02_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
2316  M02_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2317  M02_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
2318  M02_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
2319  M02_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2320  M02_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2321  M02_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2322  M02_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2323  M02_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2324  M02_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2325  M02_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
2326  M02_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
2327 
2328  mp_M02_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M02_AXI_transactor", M02_AXI_transactor_param_props);
2329 
2330  // M02_AXI' transactor ports
2331 
2332  mp_m_axi_awaddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_2");
2333  mp_m_axi_awaddr_converter_2->vector_in(m_m_axi_awaddr_converter_2_signal);
2334  mp_m_axi_awaddr_converter_2->vector_out(m_axi_concat_awaddr_out_2);
2335  mp_M02_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_2_signal);
2336  mp_m_axi_awprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_2");
2337  mp_m_axi_awprot_converter_2->vector_in(m_m_axi_awprot_converter_2_signal);
2338  mp_m_axi_awprot_converter_2->vector_out(m_axi_concat_awprot_out_2);
2339  mp_M02_AXI_transactor->AWPROT(m_m_axi_awprot_converter_2_signal);
2340  mp_m_axi_awvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_2");
2341  mp_m_axi_awvalid_converter_2->scalar_in(m_m_axi_awvalid_converter_2_signal);
2342  mp_m_axi_awvalid_converter_2->vector_out(m_axi_concat_awvalid_out_2);
2343  mp_M02_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_2_signal);
2344  mp_m_axi_awready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_2");
2345  mp_m_axi_awready_converter_2->vector_in(m_axi_split_awready_out_2);
2346  mp_m_axi_awready_converter_2->scalar_out(m_m_axi_awready_converter_2_signal);
2347  mp_M02_AXI_transactor->AWREADY(m_m_axi_awready_converter_2_signal);
2348  mp_m_axi_wdata_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_2");
2349  mp_m_axi_wdata_converter_2->vector_in(m_m_axi_wdata_converter_2_signal);
2350  mp_m_axi_wdata_converter_2->vector_out(m_axi_concat_wdata_out_2);
2351  mp_M02_AXI_transactor->WDATA(m_m_axi_wdata_converter_2_signal);
2352  mp_m_axi_wstrb_converter_2 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_2");
2353  mp_m_axi_wstrb_converter_2->vector_in(m_m_axi_wstrb_converter_2_signal);
2354  mp_m_axi_wstrb_converter_2->vector_out(m_axi_concat_wstrb_out_2);
2355  mp_M02_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_2_signal);
2356  mp_m_axi_wvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_2");
2357  mp_m_axi_wvalid_converter_2->scalar_in(m_m_axi_wvalid_converter_2_signal);
2358  mp_m_axi_wvalid_converter_2->vector_out(m_axi_concat_wvalid_out_2);
2359  mp_M02_AXI_transactor->WVALID(m_m_axi_wvalid_converter_2_signal);
2360  mp_m_axi_wready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_2");
2361  mp_m_axi_wready_converter_2->vector_in(m_axi_split_wready_out_2);
2362  mp_m_axi_wready_converter_2->scalar_out(m_m_axi_wready_converter_2_signal);
2363  mp_M02_AXI_transactor->WREADY(m_m_axi_wready_converter_2_signal);
2364  mp_m_axi_bresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_2");
2365  mp_m_axi_bresp_converter_2->vector_in(m_axi_split_bresp_out_2);
2366  mp_m_axi_bresp_converter_2->vector_out(m_m_axi_bresp_converter_2_signal);
2367  mp_M02_AXI_transactor->BRESP(m_m_axi_bresp_converter_2_signal);
2368  mp_m_axi_bvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_2");
2369  mp_m_axi_bvalid_converter_2->vector_in(m_axi_split_bvalid_out_2);
2370  mp_m_axi_bvalid_converter_2->scalar_out(m_m_axi_bvalid_converter_2_signal);
2371  mp_M02_AXI_transactor->BVALID(m_m_axi_bvalid_converter_2_signal);
2372  mp_m_axi_bready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_2");
2373  mp_m_axi_bready_converter_2->scalar_in(m_m_axi_bready_converter_2_signal);
2374  mp_m_axi_bready_converter_2->vector_out(m_axi_concat_bready_out_2);
2375  mp_M02_AXI_transactor->BREADY(m_m_axi_bready_converter_2_signal);
2376  mp_m_axi_araddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_2");
2377  mp_m_axi_araddr_converter_2->vector_in(m_m_axi_araddr_converter_2_signal);
2378  mp_m_axi_araddr_converter_2->vector_out(m_axi_concat_araddr_out_2);
2379  mp_M02_AXI_transactor->ARADDR(m_m_axi_araddr_converter_2_signal);
2380  mp_m_axi_arprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_2");
2381  mp_m_axi_arprot_converter_2->vector_in(m_m_axi_arprot_converter_2_signal);
2382  mp_m_axi_arprot_converter_2->vector_out(m_axi_concat_arprot_out_2);
2383  mp_M02_AXI_transactor->ARPROT(m_m_axi_arprot_converter_2_signal);
2384  mp_m_axi_arvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_2");
2385  mp_m_axi_arvalid_converter_2->scalar_in(m_m_axi_arvalid_converter_2_signal);
2386  mp_m_axi_arvalid_converter_2->vector_out(m_axi_concat_arvalid_out_2);
2387  mp_M02_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_2_signal);
2388  mp_m_axi_arready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_2");
2389  mp_m_axi_arready_converter_2->vector_in(m_axi_split_arready_out_2);
2390  mp_m_axi_arready_converter_2->scalar_out(m_m_axi_arready_converter_2_signal);
2391  mp_M02_AXI_transactor->ARREADY(m_m_axi_arready_converter_2_signal);
2392  mp_m_axi_rdata_converter_2 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_2");
2393  mp_m_axi_rdata_converter_2->vector_in(m_axi_split_rdata_out_2);
2394  mp_m_axi_rdata_converter_2->vector_out(m_m_axi_rdata_converter_2_signal);
2395  mp_M02_AXI_transactor->RDATA(m_m_axi_rdata_converter_2_signal);
2396  mp_m_axi_rresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_2");
2397  mp_m_axi_rresp_converter_2->vector_in(m_axi_split_rresp_out_2);
2398  mp_m_axi_rresp_converter_2->vector_out(m_m_axi_rresp_converter_2_signal);
2399  mp_M02_AXI_transactor->RRESP(m_m_axi_rresp_converter_2_signal);
2400  mp_m_axi_rvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_2");
2401  mp_m_axi_rvalid_converter_2->vector_in(m_axi_split_rvalid_out_2);
2402  mp_m_axi_rvalid_converter_2->scalar_out(m_m_axi_rvalid_converter_2_signal);
2403  mp_M02_AXI_transactor->RVALID(m_m_axi_rvalid_converter_2_signal);
2404  mp_m_axi_rready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_2");
2405  mp_m_axi_rready_converter_2->scalar_in(m_m_axi_rready_converter_2_signal);
2406  mp_m_axi_rready_converter_2->vector_out(m_axi_concat_rready_out_2);
2407  mp_M02_AXI_transactor->RREADY(m_m_axi_rready_converter_2_signal);
2408  mp_M02_AXI_transactor->CLK(aclk);
2409  mp_M02_AXI_transactor->RST(aresetn);
2410 
2411  // M02_AXI' transactor sockets
2412 
2413  mp_impl->initiator_2_rd_socket->bind(*(mp_M02_AXI_transactor->rd_socket));
2414  mp_impl->initiator_2_wr_socket->bind(*(mp_M02_AXI_transactor->wr_socket));
2415  }
2416  else
2417  {
2418  }
2419 
2420 }
2421 
2422 #endif // RIVIERA
2423 
2424 
2425 
2426 
2427 #ifdef VCSSYSTEMC
2428 design_1_xbar_0::design_1_xbar_0(const sc_core::sc_module_name& nm) : design_1_xbar_0_sc(nm), aclk("aclk"), aresetn("aresetn"), s_axi_awaddr("s_axi_awaddr"), s_axi_awprot("s_axi_awprot"), s_axi_awvalid("s_axi_awvalid"), s_axi_awready("s_axi_awready"), s_axi_wdata("s_axi_wdata"), s_axi_wstrb("s_axi_wstrb"), s_axi_wvalid("s_axi_wvalid"), s_axi_wready("s_axi_wready"), s_axi_bresp("s_axi_bresp"), s_axi_bvalid("s_axi_bvalid"), s_axi_bready("s_axi_bready"), s_axi_araddr("s_axi_araddr"), s_axi_arprot("s_axi_arprot"), s_axi_arvalid("s_axi_arvalid"), s_axi_arready("s_axi_arready"), s_axi_rdata("s_axi_rdata"), s_axi_rresp("s_axi_rresp"), s_axi_rvalid("s_axi_rvalid"), s_axi_rready("s_axi_rready"), m_axi_awaddr("m_axi_awaddr"), m_axi_awprot("m_axi_awprot"), m_axi_awvalid("m_axi_awvalid"), m_axi_awready("m_axi_awready"), m_axi_wdata("m_axi_wdata"), m_axi_wstrb("m_axi_wstrb"), m_axi_wvalid("m_axi_wvalid"), m_axi_wready("m_axi_wready"), m_axi_bresp("m_axi_bresp"), m_axi_bvalid("m_axi_bvalid"), m_axi_bready("m_axi_bready"), m_axi_araddr("m_axi_araddr"), m_axi_arprot("m_axi_arprot"), m_axi_arvalid("m_axi_arvalid"), m_axi_arready("m_axi_arready"), m_axi_rdata("m_axi_rdata"), m_axi_rresp("m_axi_rresp"), m_axi_rvalid("m_axi_rvalid"), m_axi_rready("m_axi_rready")
2429 {
2430  // initialize pins
2431  mp_impl->aclk(aclk);
2432  mp_impl->aresetn(aresetn);
2433 
2434  // initialize transactors
2435  mp_S00_AXI_transactor = NULL;
2436  mp_s_axi_awvalid_converter = NULL;
2437  mp_s_axi_awready_converter = NULL;
2438  mp_s_axi_wvalid_converter = NULL;
2439  mp_s_axi_wready_converter = NULL;
2440  mp_s_axi_bvalid_converter = NULL;
2441  mp_s_axi_bready_converter = NULL;
2442  mp_s_axi_arvalid_converter = NULL;
2443  mp_s_axi_arready_converter = NULL;
2444  mp_s_axi_rvalid_converter = NULL;
2445  mp_s_axi_rready_converter = NULL;
2446  mp_M00_AXI_transactor = NULL;
2447  mp_m_axi_awaddr_converter_0 = NULL;
2448  mp_m_axi_awprot_converter_0 = NULL;
2449  mp_m_axi_awvalid_converter_0 = NULL;
2450  mp_m_axi_awready_converter_0 = NULL;
2451  mp_m_axi_wdata_converter_0 = NULL;
2452  mp_m_axi_wstrb_converter_0 = NULL;
2453  mp_m_axi_wvalid_converter_0 = NULL;
2454  mp_m_axi_wready_converter_0 = NULL;
2455  mp_m_axi_bresp_converter_0 = NULL;
2456  mp_m_axi_bvalid_converter_0 = NULL;
2457  mp_m_axi_bready_converter_0 = NULL;
2458  mp_m_axi_araddr_converter_0 = NULL;
2459  mp_m_axi_arprot_converter_0 = NULL;
2460  mp_m_axi_arvalid_converter_0 = NULL;
2461  mp_m_axi_arready_converter_0 = NULL;
2462  mp_m_axi_rdata_converter_0 = NULL;
2463  mp_m_axi_rresp_converter_0 = NULL;
2464  mp_m_axi_rvalid_converter_0 = NULL;
2465  mp_m_axi_rready_converter_0 = NULL;
2466  mp_M01_AXI_transactor = NULL;
2467  mp_m_axi_awaddr_converter_1 = NULL;
2468  mp_m_axi_awprot_converter_1 = NULL;
2469  mp_m_axi_awvalid_converter_1 = NULL;
2470  mp_m_axi_awready_converter_1 = NULL;
2471  mp_m_axi_wdata_converter_1 = NULL;
2472  mp_m_axi_wstrb_converter_1 = NULL;
2473  mp_m_axi_wvalid_converter_1 = NULL;
2474  mp_m_axi_wready_converter_1 = NULL;
2475  mp_m_axi_bresp_converter_1 = NULL;
2476  mp_m_axi_bvalid_converter_1 = NULL;
2477  mp_m_axi_bready_converter_1 = NULL;
2478  mp_m_axi_araddr_converter_1 = NULL;
2479  mp_m_axi_arprot_converter_1 = NULL;
2480  mp_m_axi_arvalid_converter_1 = NULL;
2481  mp_m_axi_arready_converter_1 = NULL;
2482  mp_m_axi_rdata_converter_1 = NULL;
2483  mp_m_axi_rresp_converter_1 = NULL;
2484  mp_m_axi_rvalid_converter_1 = NULL;
2485  mp_m_axi_rready_converter_1 = NULL;
2486  mp_M02_AXI_transactor = NULL;
2487  mp_m_axi_awaddr_converter_2 = NULL;
2488  mp_m_axi_awprot_converter_2 = NULL;
2489  mp_m_axi_awvalid_converter_2 = NULL;
2490  mp_m_axi_awready_converter_2 = NULL;
2491  mp_m_axi_wdata_converter_2 = NULL;
2492  mp_m_axi_wstrb_converter_2 = NULL;
2493  mp_m_axi_wvalid_converter_2 = NULL;
2494  mp_m_axi_wready_converter_2 = NULL;
2495  mp_m_axi_bresp_converter_2 = NULL;
2496  mp_m_axi_bvalid_converter_2 = NULL;
2497  mp_m_axi_bready_converter_2 = NULL;
2498  mp_m_axi_araddr_converter_2 = NULL;
2499  mp_m_axi_arprot_converter_2 = NULL;
2500  mp_m_axi_arvalid_converter_2 = NULL;
2501  mp_m_axi_arready_converter_2 = NULL;
2502  mp_m_axi_rdata_converter_2 = NULL;
2503  mp_m_axi_rresp_converter_2 = NULL;
2504  mp_m_axi_rvalid_converter_2 = NULL;
2505  mp_m_axi_rready_converter_2 = NULL;
2506 
2507  // initialize port junctures
2508  mp_m_axi_concat_araddr = NULL;
2509  mp_m_axi_concat_arprot = NULL;
2510  mp_m_axi_concat_arvalid = NULL;
2511  mp_m_axi_concat_awaddr = NULL;
2512  mp_m_axi_concat_awprot = NULL;
2513  mp_m_axi_concat_awvalid = NULL;
2514  mp_m_axi_concat_bready = NULL;
2515  mp_m_axi_concat_rready = NULL;
2516  mp_m_axi_concat_wdata = NULL;
2517  mp_m_axi_concat_wstrb = NULL;
2518  mp_m_axi_concat_wvalid = NULL;
2519  mp_m_axi_split_arready = NULL;
2520  mp_m_axi_split_awready = NULL;
2521  mp_m_axi_split_bresp = NULL;
2522  mp_m_axi_split_bvalid = NULL;
2523  mp_m_axi_split_rdata = NULL;
2524  mp_m_axi_split_rresp = NULL;
2525  mp_m_axi_split_rvalid = NULL;
2526  mp_m_axi_split_wready = NULL;
2527 
2528  // Instantiate Socket Stubs
2529 
2530  // configure S00_AXI_transactor
2531  xsc::common_cpp::properties S00_AXI_transactor_param_props;
2532  S00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2533  S00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2534  S00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2535  S00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2536  S00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2537  S00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2538  S00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2539  S00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2540  S00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2541  S00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2542  S00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2543  S00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2544  S00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2545  S00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2546  S00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2547  S00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2548  S00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2549  S00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2550  S00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2551  S00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "8");
2552  S00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "8");
2553  S00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2554  S00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "4");
2555  S00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "4");
2556  S00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2557  S00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2558  S00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2559  S00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2560  S00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2561  S00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2562  S00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
2563  S00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
2564 
2565  mp_S00_AXI_transactor = new xtlm::xaximm_pin2xtlm_t<32,32,1,1,1,1,1,1>("S00_AXI_transactor", S00_AXI_transactor_param_props);
2566  mp_S00_AXI_transactor->AWADDR(s_axi_awaddr);
2567  mp_S00_AXI_transactor->AWPROT(s_axi_awprot);
2568  mp_s_axi_awvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_awvalid_converter");
2569  mp_s_axi_awvalid_converter->vector_in(s_axi_awvalid);
2570  mp_s_axi_awvalid_converter->scalar_out(m_s_axi_awvalid_converter_signal);
2571  mp_S00_AXI_transactor->AWVALID(m_s_axi_awvalid_converter_signal);
2572  mp_s_axi_awready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_awready_converter");
2573  mp_s_axi_awready_converter->scalar_in(m_s_axi_awready_converter_signal);
2574  mp_s_axi_awready_converter->vector_out(s_axi_awready);
2575  mp_S00_AXI_transactor->AWREADY(m_s_axi_awready_converter_signal);
2576  mp_S00_AXI_transactor->WDATA(s_axi_wdata);
2577  mp_S00_AXI_transactor->WSTRB(s_axi_wstrb);
2578  mp_s_axi_wvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_wvalid_converter");
2579  mp_s_axi_wvalid_converter->vector_in(s_axi_wvalid);
2580  mp_s_axi_wvalid_converter->scalar_out(m_s_axi_wvalid_converter_signal);
2581  mp_S00_AXI_transactor->WVALID(m_s_axi_wvalid_converter_signal);
2582  mp_s_axi_wready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_wready_converter");
2583  mp_s_axi_wready_converter->scalar_in(m_s_axi_wready_converter_signal);
2584  mp_s_axi_wready_converter->vector_out(s_axi_wready);
2585  mp_S00_AXI_transactor->WREADY(m_s_axi_wready_converter_signal);
2586  mp_S00_AXI_transactor->BRESP(s_axi_bresp);
2587  mp_s_axi_bvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_bvalid_converter");
2588  mp_s_axi_bvalid_converter->scalar_in(m_s_axi_bvalid_converter_signal);
2589  mp_s_axi_bvalid_converter->vector_out(s_axi_bvalid);
2590  mp_S00_AXI_transactor->BVALID(m_s_axi_bvalid_converter_signal);
2591  mp_s_axi_bready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_bready_converter");
2592  mp_s_axi_bready_converter->vector_in(s_axi_bready);
2593  mp_s_axi_bready_converter->scalar_out(m_s_axi_bready_converter_signal);
2594  mp_S00_AXI_transactor->BREADY(m_s_axi_bready_converter_signal);
2595  mp_S00_AXI_transactor->ARADDR(s_axi_araddr);
2596  mp_S00_AXI_transactor->ARPROT(s_axi_arprot);
2597  mp_s_axi_arvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_arvalid_converter");
2598  mp_s_axi_arvalid_converter->vector_in(s_axi_arvalid);
2599  mp_s_axi_arvalid_converter->scalar_out(m_s_axi_arvalid_converter_signal);
2600  mp_S00_AXI_transactor->ARVALID(m_s_axi_arvalid_converter_signal);
2601  mp_s_axi_arready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_arready_converter");
2602  mp_s_axi_arready_converter->scalar_in(m_s_axi_arready_converter_signal);
2603  mp_s_axi_arready_converter->vector_out(s_axi_arready);
2604  mp_S00_AXI_transactor->ARREADY(m_s_axi_arready_converter_signal);
2605  mp_S00_AXI_transactor->RDATA(s_axi_rdata);
2606  mp_S00_AXI_transactor->RRESP(s_axi_rresp);
2607  mp_s_axi_rvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_rvalid_converter");
2608  mp_s_axi_rvalid_converter->scalar_in(m_s_axi_rvalid_converter_signal);
2609  mp_s_axi_rvalid_converter->vector_out(s_axi_rvalid);
2610  mp_S00_AXI_transactor->RVALID(m_s_axi_rvalid_converter_signal);
2611  mp_s_axi_rready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_rready_converter");
2612  mp_s_axi_rready_converter->vector_in(s_axi_rready);
2613  mp_s_axi_rready_converter->scalar_out(m_s_axi_rready_converter_signal);
2614  mp_S00_AXI_transactor->RREADY(m_s_axi_rready_converter_signal);
2615  mp_S00_AXI_transactor->CLK(aclk);
2616  mp_S00_AXI_transactor->RST(aresetn);
2617  // configure M00_AXI_transactor
2618  xsc::common_cpp::properties M00_AXI_transactor_param_props;
2619  M00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2620  M00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2621  M00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2622  M00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2623  M00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2624  M00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2625  M00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2626  M00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2627  M00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2628  M00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2629  M00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2630  M00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2631  M00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2632  M00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2633  M00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2634  M00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2635  M00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2636  M00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2637  M00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2638  M00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
2639  M00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
2640  M00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2641  M00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
2642  M00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
2643  M00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2644  M00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2645  M00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2646  M00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2647  M00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2648  M00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2649  M00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
2650  M00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
2651 
2652  mp_M00_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M00_AXI_transactor", M00_AXI_transactor_param_props);
2653  mp_m_axi_awaddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_0");
2654  mp_m_axi_concat_awaddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_awaddr");
2655  mp_m_axi_concat_awaddr->in_port[0](m_axi_concat_awaddr_out_0);
2656  mp_m_axi_concat_awaddr->out_port(m_axi_awaddr);
2657  mp_m_axi_concat_awaddr->offset_port(0, 0);
2658  mp_m_axi_awaddr_converter_0->vector_in(m_m_axi_awaddr_converter_0_signal);
2659  mp_m_axi_awaddr_converter_0->vector_out(m_axi_concat_awaddr_out_0);
2660  mp_M00_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_0_signal);
2661  mp_m_axi_awprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_0");
2662  mp_m_axi_concat_awprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_awprot");
2663  mp_m_axi_concat_awprot->in_port[0](m_axi_concat_awprot_out_0);
2664  mp_m_axi_concat_awprot->out_port(m_axi_awprot);
2665  mp_m_axi_concat_awprot->offset_port(0, 0);
2666  mp_m_axi_awprot_converter_0->vector_in(m_m_axi_awprot_converter_0_signal);
2667  mp_m_axi_awprot_converter_0->vector_out(m_axi_concat_awprot_out_0);
2668  mp_M00_AXI_transactor->AWPROT(m_m_axi_awprot_converter_0_signal);
2669  mp_m_axi_awvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_0");
2670  mp_m_axi_concat_awvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_awvalid");
2671  mp_m_axi_concat_awvalid->in_port[0](m_axi_concat_awvalid_out_0);
2672  mp_m_axi_concat_awvalid->out_port(m_axi_awvalid);
2673  mp_m_axi_concat_awvalid->offset_port(0, 0);
2674  mp_m_axi_awvalid_converter_0->scalar_in(m_m_axi_awvalid_converter_0_signal);
2675  mp_m_axi_awvalid_converter_0->vector_out(m_axi_concat_awvalid_out_0);
2676  mp_M00_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_0_signal);
2677  mp_m_axi_awready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_0");
2678  mp_m_axi_split_awready = new xsc::xsc_split<3, 3>("m_axi_split_awready");
2679  mp_m_axi_split_awready->in_port(m_axi_awready);
2680  mp_m_axi_split_awready->out_port[0](m_axi_split_awready_out_0);
2681  mp_m_axi_split_awready->add_mask(0,1,0);
2682  mp_m_axi_awready_converter_0->vector_in(m_axi_split_awready_out_0);
2683  mp_m_axi_awready_converter_0->scalar_out(m_m_axi_awready_converter_0_signal);
2684  mp_M00_AXI_transactor->AWREADY(m_m_axi_awready_converter_0_signal);
2685  mp_m_axi_wdata_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_0");
2686  mp_m_axi_concat_wdata = new xsc::xsc_concatenator<96, 3>("m_axi_concat_wdata");
2687  mp_m_axi_concat_wdata->in_port[0](m_axi_concat_wdata_out_0);
2688  mp_m_axi_concat_wdata->out_port(m_axi_wdata);
2689  mp_m_axi_concat_wdata->offset_port(0, 0);
2690  mp_m_axi_wdata_converter_0->vector_in(m_m_axi_wdata_converter_0_signal);
2691  mp_m_axi_wdata_converter_0->vector_out(m_axi_concat_wdata_out_0);
2692  mp_M00_AXI_transactor->WDATA(m_m_axi_wdata_converter_0_signal);
2693  mp_m_axi_wstrb_converter_0 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_0");
2694  mp_m_axi_concat_wstrb = new xsc::xsc_concatenator<12, 3>("m_axi_concat_wstrb");
2695  mp_m_axi_concat_wstrb->in_port[0](m_axi_concat_wstrb_out_0);
2696  mp_m_axi_concat_wstrb->out_port(m_axi_wstrb);
2697  mp_m_axi_concat_wstrb->offset_port(0, 0);
2698  mp_m_axi_wstrb_converter_0->vector_in(m_m_axi_wstrb_converter_0_signal);
2699  mp_m_axi_wstrb_converter_0->vector_out(m_axi_concat_wstrb_out_0);
2700  mp_M00_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_0_signal);
2701  mp_m_axi_wvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_0");
2702  mp_m_axi_concat_wvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_wvalid");
2703  mp_m_axi_concat_wvalid->in_port[0](m_axi_concat_wvalid_out_0);
2704  mp_m_axi_concat_wvalid->out_port(m_axi_wvalid);
2705  mp_m_axi_concat_wvalid->offset_port(0, 0);
2706  mp_m_axi_wvalid_converter_0->scalar_in(m_m_axi_wvalid_converter_0_signal);
2707  mp_m_axi_wvalid_converter_0->vector_out(m_axi_concat_wvalid_out_0);
2708  mp_M00_AXI_transactor->WVALID(m_m_axi_wvalid_converter_0_signal);
2709  mp_m_axi_wready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_0");
2710  mp_m_axi_split_wready = new xsc::xsc_split<3, 3>("m_axi_split_wready");
2711  mp_m_axi_split_wready->in_port(m_axi_wready);
2712  mp_m_axi_split_wready->out_port[0](m_axi_split_wready_out_0);
2713  mp_m_axi_split_wready->add_mask(0,1,0);
2714  mp_m_axi_wready_converter_0->vector_in(m_axi_split_wready_out_0);
2715  mp_m_axi_wready_converter_0->scalar_out(m_m_axi_wready_converter_0_signal);
2716  mp_M00_AXI_transactor->WREADY(m_m_axi_wready_converter_0_signal);
2717  mp_m_axi_bresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_0");
2718  mp_m_axi_split_bresp = new xsc::xsc_split<6, 3>("m_axi_split_bresp");
2719  mp_m_axi_split_bresp->in_port(m_axi_bresp);
2720  mp_m_axi_split_bresp->out_port[0](m_axi_split_bresp_out_0);
2721  mp_m_axi_split_bresp->add_mask(0,2,0);
2722  mp_m_axi_bresp_converter_0->vector_in(m_axi_split_bresp_out_0);
2723  mp_m_axi_bresp_converter_0->vector_out(m_m_axi_bresp_converter_0_signal);
2724  mp_M00_AXI_transactor->BRESP(m_m_axi_bresp_converter_0_signal);
2725  mp_m_axi_bvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_0");
2726  mp_m_axi_split_bvalid = new xsc::xsc_split<3, 3>("m_axi_split_bvalid");
2727  mp_m_axi_split_bvalid->in_port(m_axi_bvalid);
2728  mp_m_axi_split_bvalid->out_port[0](m_axi_split_bvalid_out_0);
2729  mp_m_axi_split_bvalid->add_mask(0,1,0);
2730  mp_m_axi_bvalid_converter_0->vector_in(m_axi_split_bvalid_out_0);
2731  mp_m_axi_bvalid_converter_0->scalar_out(m_m_axi_bvalid_converter_0_signal);
2732  mp_M00_AXI_transactor->BVALID(m_m_axi_bvalid_converter_0_signal);
2733  mp_m_axi_bready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_0");
2734  mp_m_axi_concat_bready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_bready");
2735  mp_m_axi_concat_bready->in_port[0](m_axi_concat_bready_out_0);
2736  mp_m_axi_concat_bready->out_port(m_axi_bready);
2737  mp_m_axi_concat_bready->offset_port(0, 0);
2738  mp_m_axi_bready_converter_0->scalar_in(m_m_axi_bready_converter_0_signal);
2739  mp_m_axi_bready_converter_0->vector_out(m_axi_concat_bready_out_0);
2740  mp_M00_AXI_transactor->BREADY(m_m_axi_bready_converter_0_signal);
2741  mp_m_axi_araddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_0");
2742  mp_m_axi_concat_araddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_araddr");
2743  mp_m_axi_concat_araddr->in_port[0](m_axi_concat_araddr_out_0);
2744  mp_m_axi_concat_araddr->out_port(m_axi_araddr);
2745  mp_m_axi_concat_araddr->offset_port(0, 0);
2746  mp_m_axi_araddr_converter_0->vector_in(m_m_axi_araddr_converter_0_signal);
2747  mp_m_axi_araddr_converter_0->vector_out(m_axi_concat_araddr_out_0);
2748  mp_M00_AXI_transactor->ARADDR(m_m_axi_araddr_converter_0_signal);
2749  mp_m_axi_arprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_0");
2750  mp_m_axi_concat_arprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_arprot");
2751  mp_m_axi_concat_arprot->in_port[0](m_axi_concat_arprot_out_0);
2752  mp_m_axi_concat_arprot->out_port(m_axi_arprot);
2753  mp_m_axi_concat_arprot->offset_port(0, 0);
2754  mp_m_axi_arprot_converter_0->vector_in(m_m_axi_arprot_converter_0_signal);
2755  mp_m_axi_arprot_converter_0->vector_out(m_axi_concat_arprot_out_0);
2756  mp_M00_AXI_transactor->ARPROT(m_m_axi_arprot_converter_0_signal);
2757  mp_m_axi_arvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_0");
2758  mp_m_axi_concat_arvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_arvalid");
2759  mp_m_axi_concat_arvalid->in_port[0](m_axi_concat_arvalid_out_0);
2760  mp_m_axi_concat_arvalid->out_port(m_axi_arvalid);
2761  mp_m_axi_concat_arvalid->offset_port(0, 0);
2762  mp_m_axi_arvalid_converter_0->scalar_in(m_m_axi_arvalid_converter_0_signal);
2763  mp_m_axi_arvalid_converter_0->vector_out(m_axi_concat_arvalid_out_0);
2764  mp_M00_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_0_signal);
2765  mp_m_axi_arready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_0");
2766  mp_m_axi_split_arready = new xsc::xsc_split<3, 3>("m_axi_split_arready");
2767  mp_m_axi_split_arready->in_port(m_axi_arready);
2768  mp_m_axi_split_arready->out_port[0](m_axi_split_arready_out_0);
2769  mp_m_axi_split_arready->add_mask(0,1,0);
2770  mp_m_axi_arready_converter_0->vector_in(m_axi_split_arready_out_0);
2771  mp_m_axi_arready_converter_0->scalar_out(m_m_axi_arready_converter_0_signal);
2772  mp_M00_AXI_transactor->ARREADY(m_m_axi_arready_converter_0_signal);
2773  mp_m_axi_rdata_converter_0 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_0");
2774  mp_m_axi_split_rdata = new xsc::xsc_split<96, 3>("m_axi_split_rdata");
2775  mp_m_axi_split_rdata->in_port(m_axi_rdata);
2776  mp_m_axi_split_rdata->out_port[0](m_axi_split_rdata_out_0);
2777  mp_m_axi_split_rdata->add_mask(0,32,0);
2778  mp_m_axi_rdata_converter_0->vector_in(m_axi_split_rdata_out_0);
2779  mp_m_axi_rdata_converter_0->vector_out(m_m_axi_rdata_converter_0_signal);
2780  mp_M00_AXI_transactor->RDATA(m_m_axi_rdata_converter_0_signal);
2781  mp_m_axi_rresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_0");
2782  mp_m_axi_split_rresp = new xsc::xsc_split<6, 3>("m_axi_split_rresp");
2783  mp_m_axi_split_rresp->in_port(m_axi_rresp);
2784  mp_m_axi_split_rresp->out_port[0](m_axi_split_rresp_out_0);
2785  mp_m_axi_split_rresp->add_mask(0,2,0);
2786  mp_m_axi_rresp_converter_0->vector_in(m_axi_split_rresp_out_0);
2787  mp_m_axi_rresp_converter_0->vector_out(m_m_axi_rresp_converter_0_signal);
2788  mp_M00_AXI_transactor->RRESP(m_m_axi_rresp_converter_0_signal);
2789  mp_m_axi_rvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_0");
2790  mp_m_axi_split_rvalid = new xsc::xsc_split<3, 3>("m_axi_split_rvalid");
2791  mp_m_axi_split_rvalid->in_port(m_axi_rvalid);
2792  mp_m_axi_split_rvalid->out_port[0](m_axi_split_rvalid_out_0);
2793  mp_m_axi_split_rvalid->add_mask(0,1,0);
2794  mp_m_axi_rvalid_converter_0->vector_in(m_axi_split_rvalid_out_0);
2795  mp_m_axi_rvalid_converter_0->scalar_out(m_m_axi_rvalid_converter_0_signal);
2796  mp_M00_AXI_transactor->RVALID(m_m_axi_rvalid_converter_0_signal);
2797  mp_m_axi_rready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_0");
2798  mp_m_axi_concat_rready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_rready");
2799  mp_m_axi_concat_rready->in_port[0](m_axi_concat_rready_out_0);
2800  mp_m_axi_concat_rready->out_port(m_axi_rready);
2801  mp_m_axi_concat_rready->offset_port(0, 0);
2802  mp_m_axi_rready_converter_0->scalar_in(m_m_axi_rready_converter_0_signal);
2803  mp_m_axi_rready_converter_0->vector_out(m_axi_concat_rready_out_0);
2804  mp_M00_AXI_transactor->RREADY(m_m_axi_rready_converter_0_signal);
2805  mp_M00_AXI_transactor->CLK(aclk);
2806  mp_M00_AXI_transactor->RST(aresetn);
2807  // configure M01_AXI_transactor
2808  xsc::common_cpp::properties M01_AXI_transactor_param_props;
2809  M01_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2810  M01_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2811  M01_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2812  M01_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2813  M01_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2814  M01_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2815  M01_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2816  M01_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2817  M01_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2818  M01_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2819  M01_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2820  M01_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2821  M01_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2822  M01_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2823  M01_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2824  M01_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2825  M01_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2826  M01_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2827  M01_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2828  M01_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
2829  M01_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
2830  M01_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2831  M01_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
2832  M01_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
2833  M01_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2834  M01_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2835  M01_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2836  M01_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2837  M01_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2838  M01_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2839  M01_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
2840  M01_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
2841 
2842  mp_M01_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M01_AXI_transactor", M01_AXI_transactor_param_props);
2843  mp_m_axi_awaddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_1");
2844  mp_m_axi_concat_awaddr->in_port[1](m_axi_concat_awaddr_out_1);
2845  mp_m_axi_concat_awaddr->offset_port(1, 32);
2846  mp_m_axi_awaddr_converter_1->vector_in(m_m_axi_awaddr_converter_1_signal);
2847  mp_m_axi_awaddr_converter_1->vector_out(m_axi_concat_awaddr_out_1);
2848  mp_M01_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_1_signal);
2849  mp_m_axi_awprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_1");
2850  mp_m_axi_concat_awprot->in_port[1](m_axi_concat_awprot_out_1);
2851  mp_m_axi_concat_awprot->offset_port(1, 3);
2852  mp_m_axi_awprot_converter_1->vector_in(m_m_axi_awprot_converter_1_signal);
2853  mp_m_axi_awprot_converter_1->vector_out(m_axi_concat_awprot_out_1);
2854  mp_M01_AXI_transactor->AWPROT(m_m_axi_awprot_converter_1_signal);
2855  mp_m_axi_awvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_1");
2856  mp_m_axi_concat_awvalid->in_port[1](m_axi_concat_awvalid_out_1);
2857  mp_m_axi_concat_awvalid->offset_port(1, 1);
2858  mp_m_axi_awvalid_converter_1->scalar_in(m_m_axi_awvalid_converter_1_signal);
2859  mp_m_axi_awvalid_converter_1->vector_out(m_axi_concat_awvalid_out_1);
2860  mp_M01_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_1_signal);
2861  mp_m_axi_awready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_1");
2862 
2863  mp_m_axi_split_awready->out_port[1](m_axi_split_awready_out_1);
2864  mp_m_axi_split_awready->add_mask(1,2,1);
2865  mp_m_axi_awready_converter_1->vector_in(m_axi_split_awready_out_1);
2866  mp_m_axi_awready_converter_1->scalar_out(m_m_axi_awready_converter_1_signal);
2867  mp_M01_AXI_transactor->AWREADY(m_m_axi_awready_converter_1_signal);
2868  mp_m_axi_wdata_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_1");
2869  mp_m_axi_concat_wdata->in_port[1](m_axi_concat_wdata_out_1);
2870  mp_m_axi_concat_wdata->offset_port(1, 32);
2871  mp_m_axi_wdata_converter_1->vector_in(m_m_axi_wdata_converter_1_signal);
2872  mp_m_axi_wdata_converter_1->vector_out(m_axi_concat_wdata_out_1);
2873  mp_M01_AXI_transactor->WDATA(m_m_axi_wdata_converter_1_signal);
2874  mp_m_axi_wstrb_converter_1 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_1");
2875  mp_m_axi_concat_wstrb->in_port[1](m_axi_concat_wstrb_out_1);
2876  mp_m_axi_concat_wstrb->offset_port(1, 4);
2877  mp_m_axi_wstrb_converter_1->vector_in(m_m_axi_wstrb_converter_1_signal);
2878  mp_m_axi_wstrb_converter_1->vector_out(m_axi_concat_wstrb_out_1);
2879  mp_M01_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_1_signal);
2880  mp_m_axi_wvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_1");
2881  mp_m_axi_concat_wvalid->in_port[1](m_axi_concat_wvalid_out_1);
2882  mp_m_axi_concat_wvalid->offset_port(1, 1);
2883  mp_m_axi_wvalid_converter_1->scalar_in(m_m_axi_wvalid_converter_1_signal);
2884  mp_m_axi_wvalid_converter_1->vector_out(m_axi_concat_wvalid_out_1);
2885  mp_M01_AXI_transactor->WVALID(m_m_axi_wvalid_converter_1_signal);
2886  mp_m_axi_wready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_1");
2887 
2888  mp_m_axi_split_wready->out_port[1](m_axi_split_wready_out_1);
2889  mp_m_axi_split_wready->add_mask(1,2,1);
2890  mp_m_axi_wready_converter_1->vector_in(m_axi_split_wready_out_1);
2891  mp_m_axi_wready_converter_1->scalar_out(m_m_axi_wready_converter_1_signal);
2892  mp_M01_AXI_transactor->WREADY(m_m_axi_wready_converter_1_signal);
2893  mp_m_axi_bresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_1");
2894 
2895  mp_m_axi_split_bresp->out_port[1](m_axi_split_bresp_out_1);
2896  mp_m_axi_split_bresp->add_mask(1,4,2);
2897  mp_m_axi_bresp_converter_1->vector_in(m_axi_split_bresp_out_1);
2898  mp_m_axi_bresp_converter_1->vector_out(m_m_axi_bresp_converter_1_signal);
2899  mp_M01_AXI_transactor->BRESP(m_m_axi_bresp_converter_1_signal);
2900  mp_m_axi_bvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_1");
2901 
2902  mp_m_axi_split_bvalid->out_port[1](m_axi_split_bvalid_out_1);
2903  mp_m_axi_split_bvalid->add_mask(1,2,1);
2904  mp_m_axi_bvalid_converter_1->vector_in(m_axi_split_bvalid_out_1);
2905  mp_m_axi_bvalid_converter_1->scalar_out(m_m_axi_bvalid_converter_1_signal);
2906  mp_M01_AXI_transactor->BVALID(m_m_axi_bvalid_converter_1_signal);
2907  mp_m_axi_bready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_1");
2908  mp_m_axi_concat_bready->in_port[1](m_axi_concat_bready_out_1);
2909  mp_m_axi_concat_bready->offset_port(1, 1);
2910  mp_m_axi_bready_converter_1->scalar_in(m_m_axi_bready_converter_1_signal);
2911  mp_m_axi_bready_converter_1->vector_out(m_axi_concat_bready_out_1);
2912  mp_M01_AXI_transactor->BREADY(m_m_axi_bready_converter_1_signal);
2913  mp_m_axi_araddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_1");
2914  mp_m_axi_concat_araddr->in_port[1](m_axi_concat_araddr_out_1);
2915  mp_m_axi_concat_araddr->offset_port(1, 32);
2916  mp_m_axi_araddr_converter_1->vector_in(m_m_axi_araddr_converter_1_signal);
2917  mp_m_axi_araddr_converter_1->vector_out(m_axi_concat_araddr_out_1);
2918  mp_M01_AXI_transactor->ARADDR(m_m_axi_araddr_converter_1_signal);
2919  mp_m_axi_arprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_1");
2920  mp_m_axi_concat_arprot->in_port[1](m_axi_concat_arprot_out_1);
2921  mp_m_axi_concat_arprot->offset_port(1, 3);
2922  mp_m_axi_arprot_converter_1->vector_in(m_m_axi_arprot_converter_1_signal);
2923  mp_m_axi_arprot_converter_1->vector_out(m_axi_concat_arprot_out_1);
2924  mp_M01_AXI_transactor->ARPROT(m_m_axi_arprot_converter_1_signal);
2925  mp_m_axi_arvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_1");
2926  mp_m_axi_concat_arvalid->in_port[1](m_axi_concat_arvalid_out_1);
2927  mp_m_axi_concat_arvalid->offset_port(1, 1);
2928  mp_m_axi_arvalid_converter_1->scalar_in(m_m_axi_arvalid_converter_1_signal);
2929  mp_m_axi_arvalid_converter_1->vector_out(m_axi_concat_arvalid_out_1);
2930  mp_M01_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_1_signal);
2931  mp_m_axi_arready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_1");
2932 
2933  mp_m_axi_split_arready->out_port[1](m_axi_split_arready_out_1);
2934  mp_m_axi_split_arready->add_mask(1,2,1);
2935  mp_m_axi_arready_converter_1->vector_in(m_axi_split_arready_out_1);
2936  mp_m_axi_arready_converter_1->scalar_out(m_m_axi_arready_converter_1_signal);
2937  mp_M01_AXI_transactor->ARREADY(m_m_axi_arready_converter_1_signal);
2938  mp_m_axi_rdata_converter_1 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_1");
2939 
2940  mp_m_axi_split_rdata->out_port[1](m_axi_split_rdata_out_1);
2941  mp_m_axi_split_rdata->add_mask(1,64,32);
2942  mp_m_axi_rdata_converter_1->vector_in(m_axi_split_rdata_out_1);
2943  mp_m_axi_rdata_converter_1->vector_out(m_m_axi_rdata_converter_1_signal);
2944  mp_M01_AXI_transactor->RDATA(m_m_axi_rdata_converter_1_signal);
2945  mp_m_axi_rresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_1");
2946 
2947  mp_m_axi_split_rresp->out_port[1](m_axi_split_rresp_out_1);
2948  mp_m_axi_split_rresp->add_mask(1,4,2);
2949  mp_m_axi_rresp_converter_1->vector_in(m_axi_split_rresp_out_1);
2950  mp_m_axi_rresp_converter_1->vector_out(m_m_axi_rresp_converter_1_signal);
2951  mp_M01_AXI_transactor->RRESP(m_m_axi_rresp_converter_1_signal);
2952  mp_m_axi_rvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_1");
2953 
2954  mp_m_axi_split_rvalid->out_port[1](m_axi_split_rvalid_out_1);
2955  mp_m_axi_split_rvalid->add_mask(1,2,1);
2956  mp_m_axi_rvalid_converter_1->vector_in(m_axi_split_rvalid_out_1);
2957  mp_m_axi_rvalid_converter_1->scalar_out(m_m_axi_rvalid_converter_1_signal);
2958  mp_M01_AXI_transactor->RVALID(m_m_axi_rvalid_converter_1_signal);
2959  mp_m_axi_rready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_1");
2960  mp_m_axi_concat_rready->in_port[1](m_axi_concat_rready_out_1);
2961  mp_m_axi_concat_rready->offset_port(1, 1);
2962  mp_m_axi_rready_converter_1->scalar_in(m_m_axi_rready_converter_1_signal);
2963  mp_m_axi_rready_converter_1->vector_out(m_axi_concat_rready_out_1);
2964  mp_M01_AXI_transactor->RREADY(m_m_axi_rready_converter_1_signal);
2965  mp_M01_AXI_transactor->CLK(aclk);
2966  mp_M01_AXI_transactor->RST(aresetn);
2967  // configure M02_AXI_transactor
2968  xsc::common_cpp::properties M02_AXI_transactor_param_props;
2969  M02_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
2970  M02_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
2971  M02_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
2972  M02_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
2973  M02_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
2974  M02_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
2975  M02_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
2976  M02_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
2977  M02_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
2978  M02_AXI_transactor_param_props.addLong("HAS_BURST", "0");
2979  M02_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
2980  M02_AXI_transactor_param_props.addLong("HAS_PROT", "1");
2981  M02_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
2982  M02_AXI_transactor_param_props.addLong("HAS_QOS", "0");
2983  M02_AXI_transactor_param_props.addLong("HAS_REGION", "0");
2984  M02_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
2985  M02_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
2986  M02_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
2987  M02_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
2988  M02_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
2989  M02_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
2990  M02_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
2991  M02_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
2992  M02_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
2993  M02_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
2994  M02_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
2995  M02_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
2996  M02_AXI_transactor_param_props.addLong("HAS_RESET", "1");
2997  M02_AXI_transactor_param_props.addFloat("PHASE", "0.000");
2998  M02_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
2999  M02_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
3000  M02_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
3001 
3002  mp_M02_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M02_AXI_transactor", M02_AXI_transactor_param_props);
3003  mp_m_axi_awaddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_2");
3004  mp_m_axi_concat_awaddr->in_port[2](m_axi_concat_awaddr_out_2);
3005  mp_m_axi_concat_awaddr->offset_port(2, 64);
3006  mp_m_axi_awaddr_converter_2->vector_in(m_m_axi_awaddr_converter_2_signal);
3007  mp_m_axi_awaddr_converter_2->vector_out(m_axi_concat_awaddr_out_2);
3008  mp_M02_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_2_signal);
3009  mp_m_axi_awprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_2");
3010  mp_m_axi_concat_awprot->in_port[2](m_axi_concat_awprot_out_2);
3011  mp_m_axi_concat_awprot->offset_port(2, 6);
3012  mp_m_axi_awprot_converter_2->vector_in(m_m_axi_awprot_converter_2_signal);
3013  mp_m_axi_awprot_converter_2->vector_out(m_axi_concat_awprot_out_2);
3014  mp_M02_AXI_transactor->AWPROT(m_m_axi_awprot_converter_2_signal);
3015  mp_m_axi_awvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_2");
3016  mp_m_axi_concat_awvalid->in_port[2](m_axi_concat_awvalid_out_2);
3017  mp_m_axi_concat_awvalid->offset_port(2, 2);
3018  mp_m_axi_awvalid_converter_2->scalar_in(m_m_axi_awvalid_converter_2_signal);
3019  mp_m_axi_awvalid_converter_2->vector_out(m_axi_concat_awvalid_out_2);
3020  mp_M02_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_2_signal);
3021  mp_m_axi_awready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_2");
3022 
3023  mp_m_axi_split_awready->out_port[2](m_axi_split_awready_out_2);
3024  mp_m_axi_split_awready->add_mask(2,3,2);
3025  mp_m_axi_awready_converter_2->vector_in(m_axi_split_awready_out_2);
3026  mp_m_axi_awready_converter_2->scalar_out(m_m_axi_awready_converter_2_signal);
3027  mp_M02_AXI_transactor->AWREADY(m_m_axi_awready_converter_2_signal);
3028  mp_m_axi_wdata_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_2");
3029  mp_m_axi_concat_wdata->in_port[2](m_axi_concat_wdata_out_2);
3030  mp_m_axi_concat_wdata->offset_port(2, 64);
3031  mp_m_axi_wdata_converter_2->vector_in(m_m_axi_wdata_converter_2_signal);
3032  mp_m_axi_wdata_converter_2->vector_out(m_axi_concat_wdata_out_2);
3033  mp_M02_AXI_transactor->WDATA(m_m_axi_wdata_converter_2_signal);
3034  mp_m_axi_wstrb_converter_2 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_2");
3035  mp_m_axi_concat_wstrb->in_port[2](m_axi_concat_wstrb_out_2);
3036  mp_m_axi_concat_wstrb->offset_port(2, 8);
3037  mp_m_axi_wstrb_converter_2->vector_in(m_m_axi_wstrb_converter_2_signal);
3038  mp_m_axi_wstrb_converter_2->vector_out(m_axi_concat_wstrb_out_2);
3039  mp_M02_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_2_signal);
3040  mp_m_axi_wvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_2");
3041  mp_m_axi_concat_wvalid->in_port[2](m_axi_concat_wvalid_out_2);
3042  mp_m_axi_concat_wvalid->offset_port(2, 2);
3043  mp_m_axi_wvalid_converter_2->scalar_in(m_m_axi_wvalid_converter_2_signal);
3044  mp_m_axi_wvalid_converter_2->vector_out(m_axi_concat_wvalid_out_2);
3045  mp_M02_AXI_transactor->WVALID(m_m_axi_wvalid_converter_2_signal);
3046  mp_m_axi_wready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_2");
3047 
3048  mp_m_axi_split_wready->out_port[2](m_axi_split_wready_out_2);
3049  mp_m_axi_split_wready->add_mask(2,3,2);
3050  mp_m_axi_wready_converter_2->vector_in(m_axi_split_wready_out_2);
3051  mp_m_axi_wready_converter_2->scalar_out(m_m_axi_wready_converter_2_signal);
3052  mp_M02_AXI_transactor->WREADY(m_m_axi_wready_converter_2_signal);
3053  mp_m_axi_bresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_2");
3054 
3055  mp_m_axi_split_bresp->out_port[2](m_axi_split_bresp_out_2);
3056  mp_m_axi_split_bresp->add_mask(2,6,4);
3057  mp_m_axi_bresp_converter_2->vector_in(m_axi_split_bresp_out_2);
3058  mp_m_axi_bresp_converter_2->vector_out(m_m_axi_bresp_converter_2_signal);
3059  mp_M02_AXI_transactor->BRESP(m_m_axi_bresp_converter_2_signal);
3060  mp_m_axi_bvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_2");
3061 
3062  mp_m_axi_split_bvalid->out_port[2](m_axi_split_bvalid_out_2);
3063  mp_m_axi_split_bvalid->add_mask(2,3,2);
3064  mp_m_axi_bvalid_converter_2->vector_in(m_axi_split_bvalid_out_2);
3065  mp_m_axi_bvalid_converter_2->scalar_out(m_m_axi_bvalid_converter_2_signal);
3066  mp_M02_AXI_transactor->BVALID(m_m_axi_bvalid_converter_2_signal);
3067  mp_m_axi_bready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_2");
3068  mp_m_axi_concat_bready->in_port[2](m_axi_concat_bready_out_2);
3069  mp_m_axi_concat_bready->offset_port(2, 2);
3070  mp_m_axi_bready_converter_2->scalar_in(m_m_axi_bready_converter_2_signal);
3071  mp_m_axi_bready_converter_2->vector_out(m_axi_concat_bready_out_2);
3072  mp_M02_AXI_transactor->BREADY(m_m_axi_bready_converter_2_signal);
3073  mp_m_axi_araddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_2");
3074  mp_m_axi_concat_araddr->in_port[2](m_axi_concat_araddr_out_2);
3075  mp_m_axi_concat_araddr->offset_port(2, 64);
3076  mp_m_axi_araddr_converter_2->vector_in(m_m_axi_araddr_converter_2_signal);
3077  mp_m_axi_araddr_converter_2->vector_out(m_axi_concat_araddr_out_2);
3078  mp_M02_AXI_transactor->ARADDR(m_m_axi_araddr_converter_2_signal);
3079  mp_m_axi_arprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_2");
3080  mp_m_axi_concat_arprot->in_port[2](m_axi_concat_arprot_out_2);
3081  mp_m_axi_concat_arprot->offset_port(2, 6);
3082  mp_m_axi_arprot_converter_2->vector_in(m_m_axi_arprot_converter_2_signal);
3083  mp_m_axi_arprot_converter_2->vector_out(m_axi_concat_arprot_out_2);
3084  mp_M02_AXI_transactor->ARPROT(m_m_axi_arprot_converter_2_signal);
3085  mp_m_axi_arvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_2");
3086  mp_m_axi_concat_arvalid->in_port[2](m_axi_concat_arvalid_out_2);
3087  mp_m_axi_concat_arvalid->offset_port(2, 2);
3088  mp_m_axi_arvalid_converter_2->scalar_in(m_m_axi_arvalid_converter_2_signal);
3089  mp_m_axi_arvalid_converter_2->vector_out(m_axi_concat_arvalid_out_2);
3090  mp_M02_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_2_signal);
3091  mp_m_axi_arready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_2");
3092 
3093  mp_m_axi_split_arready->out_port[2](m_axi_split_arready_out_2);
3094  mp_m_axi_split_arready->add_mask(2,3,2);
3095  mp_m_axi_arready_converter_2->vector_in(m_axi_split_arready_out_2);
3096  mp_m_axi_arready_converter_2->scalar_out(m_m_axi_arready_converter_2_signal);
3097  mp_M02_AXI_transactor->ARREADY(m_m_axi_arready_converter_2_signal);
3098  mp_m_axi_rdata_converter_2 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_2");
3099 
3100  mp_m_axi_split_rdata->out_port[2](m_axi_split_rdata_out_2);
3101  mp_m_axi_split_rdata->add_mask(2,96,64);
3102  mp_m_axi_rdata_converter_2->vector_in(m_axi_split_rdata_out_2);
3103  mp_m_axi_rdata_converter_2->vector_out(m_m_axi_rdata_converter_2_signal);
3104  mp_M02_AXI_transactor->RDATA(m_m_axi_rdata_converter_2_signal);
3105  mp_m_axi_rresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_2");
3106 
3107  mp_m_axi_split_rresp->out_port[2](m_axi_split_rresp_out_2);
3108  mp_m_axi_split_rresp->add_mask(2,6,4);
3109  mp_m_axi_rresp_converter_2->vector_in(m_axi_split_rresp_out_2);
3110  mp_m_axi_rresp_converter_2->vector_out(m_m_axi_rresp_converter_2_signal);
3111  mp_M02_AXI_transactor->RRESP(m_m_axi_rresp_converter_2_signal);
3112  mp_m_axi_rvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_2");
3113 
3114  mp_m_axi_split_rvalid->out_port[2](m_axi_split_rvalid_out_2);
3115  mp_m_axi_split_rvalid->add_mask(2,3,2);
3116  mp_m_axi_rvalid_converter_2->vector_in(m_axi_split_rvalid_out_2);
3117  mp_m_axi_rvalid_converter_2->scalar_out(m_m_axi_rvalid_converter_2_signal);
3118  mp_M02_AXI_transactor->RVALID(m_m_axi_rvalid_converter_2_signal);
3119  mp_m_axi_rready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_2");
3120  mp_m_axi_concat_rready->in_port[2](m_axi_concat_rready_out_2);
3121  mp_m_axi_concat_rready->offset_port(2, 2);
3122  mp_m_axi_rready_converter_2->scalar_in(m_m_axi_rready_converter_2_signal);
3123  mp_m_axi_rready_converter_2->vector_out(m_axi_concat_rready_out_2);
3124  mp_M02_AXI_transactor->RREADY(m_m_axi_rready_converter_2_signal);
3125  mp_M02_AXI_transactor->CLK(aclk);
3126  mp_M02_AXI_transactor->RST(aresetn);
3127 
3128  // initialize transactors stubs
3129  S00_AXI_transactor_target_wr_socket_stub = nullptr;
3130  S00_AXI_transactor_target_rd_socket_stub = nullptr;
3131  M00_AXI_transactor_initiator_wr_socket_stub = nullptr;
3132  M00_AXI_transactor_initiator_rd_socket_stub = nullptr;
3133  M01_AXI_transactor_initiator_wr_socket_stub = nullptr;
3134  M01_AXI_transactor_initiator_rd_socket_stub = nullptr;
3135  M02_AXI_transactor_initiator_wr_socket_stub = nullptr;
3136  M02_AXI_transactor_initiator_rd_socket_stub = nullptr;
3137 
3138 }
3139 
3140 void design_1_xbar_0::before_end_of_elaboration()
3141 {
3142  // configure 'S00_AXI' transactor
3143  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "S00_AXI_TLM_MODE") != 1)
3144  {
3145  mp_impl->target_0_rd_socket->bind(*(mp_S00_AXI_transactor->rd_socket));
3146  mp_impl->target_0_wr_socket->bind(*(mp_S00_AXI_transactor->wr_socket));
3147 
3148  }
3149  else
3150  {
3151  S00_AXI_transactor_target_wr_socket_stub = new xtlm::xtlm_aximm_target_stub("wr_socket",0);
3152  S00_AXI_transactor_target_wr_socket_stub->bind(*(mp_S00_AXI_transactor->wr_socket));
3153  S00_AXI_transactor_target_rd_socket_stub = new xtlm::xtlm_aximm_target_stub("rd_socket",0);
3154  S00_AXI_transactor_target_rd_socket_stub->bind(*(mp_S00_AXI_transactor->rd_socket));
3155  mp_S00_AXI_transactor->disable_transactor();
3156  }
3157 
3158  // configure 'M00_AXI' transactor
3159  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M00_AXI_TLM_MODE") != 1)
3160  {
3161  mp_impl->initiator_0_rd_socket->bind(*(mp_M00_AXI_transactor->rd_socket));
3162  mp_impl->initiator_0_wr_socket->bind(*(mp_M00_AXI_transactor->wr_socket));
3163 
3164  }
3165  else
3166  {
3167  M00_AXI_transactor_initiator_wr_socket_stub = new xtlm::xtlm_aximm_initiator_stub("wr_socket",0);
3168  M00_AXI_transactor_initiator_wr_socket_stub->bind(*(mp_M00_AXI_transactor->wr_socket));
3169  M00_AXI_transactor_initiator_rd_socket_stub = new xtlm::xtlm_aximm_initiator_stub("rd_socket",0);
3170  M00_AXI_transactor_initiator_rd_socket_stub->bind(*(mp_M00_AXI_transactor->rd_socket));
3171  mp_M00_AXI_transactor->disable_transactor();
3172  }
3173 
3174  // configure 'M01_AXI' transactor
3175  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M01_AXI_TLM_MODE") != 1)
3176  {
3177  mp_impl->initiator_1_rd_socket->bind(*(mp_M01_AXI_transactor->rd_socket));
3178  mp_impl->initiator_1_wr_socket->bind(*(mp_M01_AXI_transactor->wr_socket));
3179 
3180  }
3181  else
3182  {
3183  M01_AXI_transactor_initiator_wr_socket_stub = new xtlm::xtlm_aximm_initiator_stub("wr_socket",0);
3184  M01_AXI_transactor_initiator_wr_socket_stub->bind(*(mp_M01_AXI_transactor->wr_socket));
3185  M01_AXI_transactor_initiator_rd_socket_stub = new xtlm::xtlm_aximm_initiator_stub("rd_socket",0);
3186  M01_AXI_transactor_initiator_rd_socket_stub->bind(*(mp_M01_AXI_transactor->rd_socket));
3187  mp_M01_AXI_transactor->disable_transactor();
3188  }
3189 
3190  // configure 'M02_AXI' transactor
3191  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M02_AXI_TLM_MODE") != 1)
3192  {
3193  mp_impl->initiator_2_rd_socket->bind(*(mp_M02_AXI_transactor->rd_socket));
3194  mp_impl->initiator_2_wr_socket->bind(*(mp_M02_AXI_transactor->wr_socket));
3195 
3196  }
3197  else
3198  {
3199  M02_AXI_transactor_initiator_wr_socket_stub = new xtlm::xtlm_aximm_initiator_stub("wr_socket",0);
3200  M02_AXI_transactor_initiator_wr_socket_stub->bind(*(mp_M02_AXI_transactor->wr_socket));
3201  M02_AXI_transactor_initiator_rd_socket_stub = new xtlm::xtlm_aximm_initiator_stub("rd_socket",0);
3202  M02_AXI_transactor_initiator_rd_socket_stub->bind(*(mp_M02_AXI_transactor->rd_socket));
3203  mp_M02_AXI_transactor->disable_transactor();
3204  }
3205 
3206 }
3207 
3208 #endif // VCSSYSTEMC
3209 
3210 
3211 
3212 
3213 #ifdef MTI_SYSTEMC
3214 design_1_xbar_0::design_1_xbar_0(const sc_core::sc_module_name& nm) : design_1_xbar_0_sc(nm), aclk("aclk"), aresetn("aresetn"), s_axi_awaddr("s_axi_awaddr"), s_axi_awprot("s_axi_awprot"), s_axi_awvalid("s_axi_awvalid"), s_axi_awready("s_axi_awready"), s_axi_wdata("s_axi_wdata"), s_axi_wstrb("s_axi_wstrb"), s_axi_wvalid("s_axi_wvalid"), s_axi_wready("s_axi_wready"), s_axi_bresp("s_axi_bresp"), s_axi_bvalid("s_axi_bvalid"), s_axi_bready("s_axi_bready"), s_axi_araddr("s_axi_araddr"), s_axi_arprot("s_axi_arprot"), s_axi_arvalid("s_axi_arvalid"), s_axi_arready("s_axi_arready"), s_axi_rdata("s_axi_rdata"), s_axi_rresp("s_axi_rresp"), s_axi_rvalid("s_axi_rvalid"), s_axi_rready("s_axi_rready"), m_axi_awaddr("m_axi_awaddr"), m_axi_awprot("m_axi_awprot"), m_axi_awvalid("m_axi_awvalid"), m_axi_awready("m_axi_awready"), m_axi_wdata("m_axi_wdata"), m_axi_wstrb("m_axi_wstrb"), m_axi_wvalid("m_axi_wvalid"), m_axi_wready("m_axi_wready"), m_axi_bresp("m_axi_bresp"), m_axi_bvalid("m_axi_bvalid"), m_axi_bready("m_axi_bready"), m_axi_araddr("m_axi_araddr"), m_axi_arprot("m_axi_arprot"), m_axi_arvalid("m_axi_arvalid"), m_axi_arready("m_axi_arready"), m_axi_rdata("m_axi_rdata"), m_axi_rresp("m_axi_rresp"), m_axi_rvalid("m_axi_rvalid"), m_axi_rready("m_axi_rready")
3215 {
3216  // initialize pins
3217  mp_impl->aclk(aclk);
3218  mp_impl->aresetn(aresetn);
3219 
3220  // initialize transactors
3221  mp_S00_AXI_transactor = NULL;
3222  mp_s_axi_awvalid_converter = NULL;
3223  mp_s_axi_awready_converter = NULL;
3224  mp_s_axi_wvalid_converter = NULL;
3225  mp_s_axi_wready_converter = NULL;
3226  mp_s_axi_bvalid_converter = NULL;
3227  mp_s_axi_bready_converter = NULL;
3228  mp_s_axi_arvalid_converter = NULL;
3229  mp_s_axi_arready_converter = NULL;
3230  mp_s_axi_rvalid_converter = NULL;
3231  mp_s_axi_rready_converter = NULL;
3232  mp_M00_AXI_transactor = NULL;
3233  mp_m_axi_awaddr_converter_0 = NULL;
3234  mp_m_axi_awprot_converter_0 = NULL;
3235  mp_m_axi_awvalid_converter_0 = NULL;
3236  mp_m_axi_awready_converter_0 = NULL;
3237  mp_m_axi_wdata_converter_0 = NULL;
3238  mp_m_axi_wstrb_converter_0 = NULL;
3239  mp_m_axi_wvalid_converter_0 = NULL;
3240  mp_m_axi_wready_converter_0 = NULL;
3241  mp_m_axi_bresp_converter_0 = NULL;
3242  mp_m_axi_bvalid_converter_0 = NULL;
3243  mp_m_axi_bready_converter_0 = NULL;
3244  mp_m_axi_araddr_converter_0 = NULL;
3245  mp_m_axi_arprot_converter_0 = NULL;
3246  mp_m_axi_arvalid_converter_0 = NULL;
3247  mp_m_axi_arready_converter_0 = NULL;
3248  mp_m_axi_rdata_converter_0 = NULL;
3249  mp_m_axi_rresp_converter_0 = NULL;
3250  mp_m_axi_rvalid_converter_0 = NULL;
3251  mp_m_axi_rready_converter_0 = NULL;
3252  mp_M01_AXI_transactor = NULL;
3253  mp_m_axi_awaddr_converter_1 = NULL;
3254  mp_m_axi_awprot_converter_1 = NULL;
3255  mp_m_axi_awvalid_converter_1 = NULL;
3256  mp_m_axi_awready_converter_1 = NULL;
3257  mp_m_axi_wdata_converter_1 = NULL;
3258  mp_m_axi_wstrb_converter_1 = NULL;
3259  mp_m_axi_wvalid_converter_1 = NULL;
3260  mp_m_axi_wready_converter_1 = NULL;
3261  mp_m_axi_bresp_converter_1 = NULL;
3262  mp_m_axi_bvalid_converter_1 = NULL;
3263  mp_m_axi_bready_converter_1 = NULL;
3264  mp_m_axi_araddr_converter_1 = NULL;
3265  mp_m_axi_arprot_converter_1 = NULL;
3266  mp_m_axi_arvalid_converter_1 = NULL;
3267  mp_m_axi_arready_converter_1 = NULL;
3268  mp_m_axi_rdata_converter_1 = NULL;
3269  mp_m_axi_rresp_converter_1 = NULL;
3270  mp_m_axi_rvalid_converter_1 = NULL;
3271  mp_m_axi_rready_converter_1 = NULL;
3272  mp_M02_AXI_transactor = NULL;
3273  mp_m_axi_awaddr_converter_2 = NULL;
3274  mp_m_axi_awprot_converter_2 = NULL;
3275  mp_m_axi_awvalid_converter_2 = NULL;
3276  mp_m_axi_awready_converter_2 = NULL;
3277  mp_m_axi_wdata_converter_2 = NULL;
3278  mp_m_axi_wstrb_converter_2 = NULL;
3279  mp_m_axi_wvalid_converter_2 = NULL;
3280  mp_m_axi_wready_converter_2 = NULL;
3281  mp_m_axi_bresp_converter_2 = NULL;
3282  mp_m_axi_bvalid_converter_2 = NULL;
3283  mp_m_axi_bready_converter_2 = NULL;
3284  mp_m_axi_araddr_converter_2 = NULL;
3285  mp_m_axi_arprot_converter_2 = NULL;
3286  mp_m_axi_arvalid_converter_2 = NULL;
3287  mp_m_axi_arready_converter_2 = NULL;
3288  mp_m_axi_rdata_converter_2 = NULL;
3289  mp_m_axi_rresp_converter_2 = NULL;
3290  mp_m_axi_rvalid_converter_2 = NULL;
3291  mp_m_axi_rready_converter_2 = NULL;
3292 
3293  // initialize port junctures
3294  mp_m_axi_concat_araddr = NULL;
3295  mp_m_axi_concat_arprot = NULL;
3296  mp_m_axi_concat_arvalid = NULL;
3297  mp_m_axi_concat_awaddr = NULL;
3298  mp_m_axi_concat_awprot = NULL;
3299  mp_m_axi_concat_awvalid = NULL;
3300  mp_m_axi_concat_bready = NULL;
3301  mp_m_axi_concat_rready = NULL;
3302  mp_m_axi_concat_wdata = NULL;
3303  mp_m_axi_concat_wstrb = NULL;
3304  mp_m_axi_concat_wvalid = NULL;
3305  mp_m_axi_split_arready = NULL;
3306  mp_m_axi_split_awready = NULL;
3307  mp_m_axi_split_bresp = NULL;
3308  mp_m_axi_split_bvalid = NULL;
3309  mp_m_axi_split_rdata = NULL;
3310  mp_m_axi_split_rresp = NULL;
3311  mp_m_axi_split_rvalid = NULL;
3312  mp_m_axi_split_wready = NULL;
3313 
3314  // Instantiate Socket Stubs
3315 
3316  // configure S00_AXI_transactor
3317  xsc::common_cpp::properties S00_AXI_transactor_param_props;
3318  S00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
3319  S00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
3320  S00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
3321  S00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
3322  S00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
3323  S00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
3324  S00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
3325  S00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
3326  S00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
3327  S00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
3328  S00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
3329  S00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
3330  S00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
3331  S00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
3332  S00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
3333  S00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
3334  S00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
3335  S00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
3336  S00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
3337  S00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "8");
3338  S00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "8");
3339  S00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
3340  S00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "4");
3341  S00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "4");
3342  S00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
3343  S00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
3344  S00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
3345  S00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
3346  S00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
3347  S00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
3348  S00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
3349  S00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
3350 
3351  mp_S00_AXI_transactor = new xtlm::xaximm_pin2xtlm_t<32,32,1,1,1,1,1,1>("S00_AXI_transactor", S00_AXI_transactor_param_props);
3352  mp_S00_AXI_transactor->AWADDR(s_axi_awaddr);
3353  mp_S00_AXI_transactor->AWPROT(s_axi_awprot);
3354  mp_s_axi_awvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_awvalid_converter");
3355  mp_s_axi_awvalid_converter->vector_in(s_axi_awvalid);
3356  mp_s_axi_awvalid_converter->scalar_out(m_s_axi_awvalid_converter_signal);
3357  mp_S00_AXI_transactor->AWVALID(m_s_axi_awvalid_converter_signal);
3358  mp_s_axi_awready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_awready_converter");
3359  mp_s_axi_awready_converter->scalar_in(m_s_axi_awready_converter_signal);
3360  mp_s_axi_awready_converter->vector_out(s_axi_awready);
3361  mp_S00_AXI_transactor->AWREADY(m_s_axi_awready_converter_signal);
3362  mp_S00_AXI_transactor->WDATA(s_axi_wdata);
3363  mp_S00_AXI_transactor->WSTRB(s_axi_wstrb);
3364  mp_s_axi_wvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_wvalid_converter");
3365  mp_s_axi_wvalid_converter->vector_in(s_axi_wvalid);
3366  mp_s_axi_wvalid_converter->scalar_out(m_s_axi_wvalid_converter_signal);
3367  mp_S00_AXI_transactor->WVALID(m_s_axi_wvalid_converter_signal);
3368  mp_s_axi_wready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_wready_converter");
3369  mp_s_axi_wready_converter->scalar_in(m_s_axi_wready_converter_signal);
3370  mp_s_axi_wready_converter->vector_out(s_axi_wready);
3371  mp_S00_AXI_transactor->WREADY(m_s_axi_wready_converter_signal);
3372  mp_S00_AXI_transactor->BRESP(s_axi_bresp);
3373  mp_s_axi_bvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_bvalid_converter");
3374  mp_s_axi_bvalid_converter->scalar_in(m_s_axi_bvalid_converter_signal);
3375  mp_s_axi_bvalid_converter->vector_out(s_axi_bvalid);
3376  mp_S00_AXI_transactor->BVALID(m_s_axi_bvalid_converter_signal);
3377  mp_s_axi_bready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_bready_converter");
3378  mp_s_axi_bready_converter->vector_in(s_axi_bready);
3379  mp_s_axi_bready_converter->scalar_out(m_s_axi_bready_converter_signal);
3380  mp_S00_AXI_transactor->BREADY(m_s_axi_bready_converter_signal);
3381  mp_S00_AXI_transactor->ARADDR(s_axi_araddr);
3382  mp_S00_AXI_transactor->ARPROT(s_axi_arprot);
3383  mp_s_axi_arvalid_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_arvalid_converter");
3384  mp_s_axi_arvalid_converter->vector_in(s_axi_arvalid);
3385  mp_s_axi_arvalid_converter->scalar_out(m_s_axi_arvalid_converter_signal);
3386  mp_S00_AXI_transactor->ARVALID(m_s_axi_arvalid_converter_signal);
3387  mp_s_axi_arready_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_arready_converter");
3388  mp_s_axi_arready_converter->scalar_in(m_s_axi_arready_converter_signal);
3389  mp_s_axi_arready_converter->vector_out(s_axi_arready);
3390  mp_S00_AXI_transactor->ARREADY(m_s_axi_arready_converter_signal);
3391  mp_S00_AXI_transactor->RDATA(s_axi_rdata);
3392  mp_S00_AXI_transactor->RRESP(s_axi_rresp);
3393  mp_s_axi_rvalid_converter = new xsc::common::scalar2vectorN_converter<1>("s_axi_rvalid_converter");
3394  mp_s_axi_rvalid_converter->scalar_in(m_s_axi_rvalid_converter_signal);
3395  mp_s_axi_rvalid_converter->vector_out(s_axi_rvalid);
3396  mp_S00_AXI_transactor->RVALID(m_s_axi_rvalid_converter_signal);
3397  mp_s_axi_rready_converter = new xsc::common::vectorN2scalar_converter<1>("s_axi_rready_converter");
3398  mp_s_axi_rready_converter->vector_in(s_axi_rready);
3399  mp_s_axi_rready_converter->scalar_out(m_s_axi_rready_converter_signal);
3400  mp_S00_AXI_transactor->RREADY(m_s_axi_rready_converter_signal);
3401  mp_S00_AXI_transactor->CLK(aclk);
3402  mp_S00_AXI_transactor->RST(aresetn);
3403  // configure M00_AXI_transactor
3404  xsc::common_cpp::properties M00_AXI_transactor_param_props;
3405  M00_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
3406  M00_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
3407  M00_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
3408  M00_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
3409  M00_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
3410  M00_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
3411  M00_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
3412  M00_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
3413  M00_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
3414  M00_AXI_transactor_param_props.addLong("HAS_BURST", "0");
3415  M00_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
3416  M00_AXI_transactor_param_props.addLong("HAS_PROT", "1");
3417  M00_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
3418  M00_AXI_transactor_param_props.addLong("HAS_QOS", "0");
3419  M00_AXI_transactor_param_props.addLong("HAS_REGION", "0");
3420  M00_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
3421  M00_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
3422  M00_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
3423  M00_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
3424  M00_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
3425  M00_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
3426  M00_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
3427  M00_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
3428  M00_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
3429  M00_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
3430  M00_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
3431  M00_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
3432  M00_AXI_transactor_param_props.addLong("HAS_RESET", "1");
3433  M00_AXI_transactor_param_props.addFloat("PHASE", "0.000");
3434  M00_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
3435  M00_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
3436  M00_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
3437 
3438  mp_M00_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M00_AXI_transactor", M00_AXI_transactor_param_props);
3439  mp_m_axi_awaddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_0");
3440  mp_m_axi_concat_awaddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_awaddr");
3441  mp_m_axi_concat_awaddr->in_port[0](m_axi_concat_awaddr_out_0);
3442  mp_m_axi_concat_awaddr->out_port(m_axi_awaddr);
3443  mp_m_axi_concat_awaddr->offset_port(0, 0);
3444  mp_m_axi_awaddr_converter_0->vector_in(m_m_axi_awaddr_converter_0_signal);
3445  mp_m_axi_awaddr_converter_0->vector_out(m_axi_concat_awaddr_out_0);
3446  mp_M00_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_0_signal);
3447  mp_m_axi_awprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_0");
3448  mp_m_axi_concat_awprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_awprot");
3449  mp_m_axi_concat_awprot->in_port[0](m_axi_concat_awprot_out_0);
3450  mp_m_axi_concat_awprot->out_port(m_axi_awprot);
3451  mp_m_axi_concat_awprot->offset_port(0, 0);
3452  mp_m_axi_awprot_converter_0->vector_in(m_m_axi_awprot_converter_0_signal);
3453  mp_m_axi_awprot_converter_0->vector_out(m_axi_concat_awprot_out_0);
3454  mp_M00_AXI_transactor->AWPROT(m_m_axi_awprot_converter_0_signal);
3455  mp_m_axi_awvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_0");
3456  mp_m_axi_concat_awvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_awvalid");
3457  mp_m_axi_concat_awvalid->in_port[0](m_axi_concat_awvalid_out_0);
3458  mp_m_axi_concat_awvalid->out_port(m_axi_awvalid);
3459  mp_m_axi_concat_awvalid->offset_port(0, 0);
3460  mp_m_axi_awvalid_converter_0->scalar_in(m_m_axi_awvalid_converter_0_signal);
3461  mp_m_axi_awvalid_converter_0->vector_out(m_axi_concat_awvalid_out_0);
3462  mp_M00_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_0_signal);
3463  mp_m_axi_awready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_0");
3464  mp_m_axi_split_awready = new xsc::xsc_split<3, 3>("m_axi_split_awready");
3465  mp_m_axi_split_awready->in_port(m_axi_awready);
3466  mp_m_axi_split_awready->out_port[0](m_axi_split_awready_out_0);
3467  mp_m_axi_split_awready->add_mask(0,1,0);
3468  mp_m_axi_awready_converter_0->vector_in(m_axi_split_awready_out_0);
3469  mp_m_axi_awready_converter_0->scalar_out(m_m_axi_awready_converter_0_signal);
3470  mp_M00_AXI_transactor->AWREADY(m_m_axi_awready_converter_0_signal);
3471  mp_m_axi_wdata_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_0");
3472  mp_m_axi_concat_wdata = new xsc::xsc_concatenator<96, 3>("m_axi_concat_wdata");
3473  mp_m_axi_concat_wdata->in_port[0](m_axi_concat_wdata_out_0);
3474  mp_m_axi_concat_wdata->out_port(m_axi_wdata);
3475  mp_m_axi_concat_wdata->offset_port(0, 0);
3476  mp_m_axi_wdata_converter_0->vector_in(m_m_axi_wdata_converter_0_signal);
3477  mp_m_axi_wdata_converter_0->vector_out(m_axi_concat_wdata_out_0);
3478  mp_M00_AXI_transactor->WDATA(m_m_axi_wdata_converter_0_signal);
3479  mp_m_axi_wstrb_converter_0 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_0");
3480  mp_m_axi_concat_wstrb = new xsc::xsc_concatenator<12, 3>("m_axi_concat_wstrb");
3481  mp_m_axi_concat_wstrb->in_port[0](m_axi_concat_wstrb_out_0);
3482  mp_m_axi_concat_wstrb->out_port(m_axi_wstrb);
3483  mp_m_axi_concat_wstrb->offset_port(0, 0);
3484  mp_m_axi_wstrb_converter_0->vector_in(m_m_axi_wstrb_converter_0_signal);
3485  mp_m_axi_wstrb_converter_0->vector_out(m_axi_concat_wstrb_out_0);
3486  mp_M00_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_0_signal);
3487  mp_m_axi_wvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_0");
3488  mp_m_axi_concat_wvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_wvalid");
3489  mp_m_axi_concat_wvalid->in_port[0](m_axi_concat_wvalid_out_0);
3490  mp_m_axi_concat_wvalid->out_port(m_axi_wvalid);
3491  mp_m_axi_concat_wvalid->offset_port(0, 0);
3492  mp_m_axi_wvalid_converter_0->scalar_in(m_m_axi_wvalid_converter_0_signal);
3493  mp_m_axi_wvalid_converter_0->vector_out(m_axi_concat_wvalid_out_0);
3494  mp_M00_AXI_transactor->WVALID(m_m_axi_wvalid_converter_0_signal);
3495  mp_m_axi_wready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_0");
3496  mp_m_axi_split_wready = new xsc::xsc_split<3, 3>("m_axi_split_wready");
3497  mp_m_axi_split_wready->in_port(m_axi_wready);
3498  mp_m_axi_split_wready->out_port[0](m_axi_split_wready_out_0);
3499  mp_m_axi_split_wready->add_mask(0,1,0);
3500  mp_m_axi_wready_converter_0->vector_in(m_axi_split_wready_out_0);
3501  mp_m_axi_wready_converter_0->scalar_out(m_m_axi_wready_converter_0_signal);
3502  mp_M00_AXI_transactor->WREADY(m_m_axi_wready_converter_0_signal);
3503  mp_m_axi_bresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_0");
3504  mp_m_axi_split_bresp = new xsc::xsc_split<6, 3>("m_axi_split_bresp");
3505  mp_m_axi_split_bresp->in_port(m_axi_bresp);
3506  mp_m_axi_split_bresp->out_port[0](m_axi_split_bresp_out_0);
3507  mp_m_axi_split_bresp->add_mask(0,2,0);
3508  mp_m_axi_bresp_converter_0->vector_in(m_axi_split_bresp_out_0);
3509  mp_m_axi_bresp_converter_0->vector_out(m_m_axi_bresp_converter_0_signal);
3510  mp_M00_AXI_transactor->BRESP(m_m_axi_bresp_converter_0_signal);
3511  mp_m_axi_bvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_0");
3512  mp_m_axi_split_bvalid = new xsc::xsc_split<3, 3>("m_axi_split_bvalid");
3513  mp_m_axi_split_bvalid->in_port(m_axi_bvalid);
3514  mp_m_axi_split_bvalid->out_port[0](m_axi_split_bvalid_out_0);
3515  mp_m_axi_split_bvalid->add_mask(0,1,0);
3516  mp_m_axi_bvalid_converter_0->vector_in(m_axi_split_bvalid_out_0);
3517  mp_m_axi_bvalid_converter_0->scalar_out(m_m_axi_bvalid_converter_0_signal);
3518  mp_M00_AXI_transactor->BVALID(m_m_axi_bvalid_converter_0_signal);
3519  mp_m_axi_bready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_0");
3520  mp_m_axi_concat_bready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_bready");
3521  mp_m_axi_concat_bready->in_port[0](m_axi_concat_bready_out_0);
3522  mp_m_axi_concat_bready->out_port(m_axi_bready);
3523  mp_m_axi_concat_bready->offset_port(0, 0);
3524  mp_m_axi_bready_converter_0->scalar_in(m_m_axi_bready_converter_0_signal);
3525  mp_m_axi_bready_converter_0->vector_out(m_axi_concat_bready_out_0);
3526  mp_M00_AXI_transactor->BREADY(m_m_axi_bready_converter_0_signal);
3527  mp_m_axi_araddr_converter_0 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_0");
3528  mp_m_axi_concat_araddr = new xsc::xsc_concatenator<96, 3>("m_axi_concat_araddr");
3529  mp_m_axi_concat_araddr->in_port[0](m_axi_concat_araddr_out_0);
3530  mp_m_axi_concat_araddr->out_port(m_axi_araddr);
3531  mp_m_axi_concat_araddr->offset_port(0, 0);
3532  mp_m_axi_araddr_converter_0->vector_in(m_m_axi_araddr_converter_0_signal);
3533  mp_m_axi_araddr_converter_0->vector_out(m_axi_concat_araddr_out_0);
3534  mp_M00_AXI_transactor->ARADDR(m_m_axi_araddr_converter_0_signal);
3535  mp_m_axi_arprot_converter_0 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_0");
3536  mp_m_axi_concat_arprot = new xsc::xsc_concatenator<9, 3>("m_axi_concat_arprot");
3537  mp_m_axi_concat_arprot->in_port[0](m_axi_concat_arprot_out_0);
3538  mp_m_axi_concat_arprot->out_port(m_axi_arprot);
3539  mp_m_axi_concat_arprot->offset_port(0, 0);
3540  mp_m_axi_arprot_converter_0->vector_in(m_m_axi_arprot_converter_0_signal);
3541  mp_m_axi_arprot_converter_0->vector_out(m_axi_concat_arprot_out_0);
3542  mp_M00_AXI_transactor->ARPROT(m_m_axi_arprot_converter_0_signal);
3543  mp_m_axi_arvalid_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_0");
3544  mp_m_axi_concat_arvalid = new xsc::xsc_concatenator<3, 3>("m_axi_concat_arvalid");
3545  mp_m_axi_concat_arvalid->in_port[0](m_axi_concat_arvalid_out_0);
3546  mp_m_axi_concat_arvalid->out_port(m_axi_arvalid);
3547  mp_m_axi_concat_arvalid->offset_port(0, 0);
3548  mp_m_axi_arvalid_converter_0->scalar_in(m_m_axi_arvalid_converter_0_signal);
3549  mp_m_axi_arvalid_converter_0->vector_out(m_axi_concat_arvalid_out_0);
3550  mp_M00_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_0_signal);
3551  mp_m_axi_arready_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_0");
3552  mp_m_axi_split_arready = new xsc::xsc_split<3, 3>("m_axi_split_arready");
3553  mp_m_axi_split_arready->in_port(m_axi_arready);
3554  mp_m_axi_split_arready->out_port[0](m_axi_split_arready_out_0);
3555  mp_m_axi_split_arready->add_mask(0,1,0);
3556  mp_m_axi_arready_converter_0->vector_in(m_axi_split_arready_out_0);
3557  mp_m_axi_arready_converter_0->scalar_out(m_m_axi_arready_converter_0_signal);
3558  mp_M00_AXI_transactor->ARREADY(m_m_axi_arready_converter_0_signal);
3559  mp_m_axi_rdata_converter_0 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_0");
3560  mp_m_axi_split_rdata = new xsc::xsc_split<96, 3>("m_axi_split_rdata");
3561  mp_m_axi_split_rdata->in_port(m_axi_rdata);
3562  mp_m_axi_split_rdata->out_port[0](m_axi_split_rdata_out_0);
3563  mp_m_axi_split_rdata->add_mask(0,32,0);
3564  mp_m_axi_rdata_converter_0->vector_in(m_axi_split_rdata_out_0);
3565  mp_m_axi_rdata_converter_0->vector_out(m_m_axi_rdata_converter_0_signal);
3566  mp_M00_AXI_transactor->RDATA(m_m_axi_rdata_converter_0_signal);
3567  mp_m_axi_rresp_converter_0 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_0");
3568  mp_m_axi_split_rresp = new xsc::xsc_split<6, 3>("m_axi_split_rresp");
3569  mp_m_axi_split_rresp->in_port(m_axi_rresp);
3570  mp_m_axi_split_rresp->out_port[0](m_axi_split_rresp_out_0);
3571  mp_m_axi_split_rresp->add_mask(0,2,0);
3572  mp_m_axi_rresp_converter_0->vector_in(m_axi_split_rresp_out_0);
3573  mp_m_axi_rresp_converter_0->vector_out(m_m_axi_rresp_converter_0_signal);
3574  mp_M00_AXI_transactor->RRESP(m_m_axi_rresp_converter_0_signal);
3575  mp_m_axi_rvalid_converter_0 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_0");
3576  mp_m_axi_split_rvalid = new xsc::xsc_split<3, 3>("m_axi_split_rvalid");
3577  mp_m_axi_split_rvalid->in_port(m_axi_rvalid);
3578  mp_m_axi_split_rvalid->out_port[0](m_axi_split_rvalid_out_0);
3579  mp_m_axi_split_rvalid->add_mask(0,1,0);
3580  mp_m_axi_rvalid_converter_0->vector_in(m_axi_split_rvalid_out_0);
3581  mp_m_axi_rvalid_converter_0->scalar_out(m_m_axi_rvalid_converter_0_signal);
3582  mp_M00_AXI_transactor->RVALID(m_m_axi_rvalid_converter_0_signal);
3583  mp_m_axi_rready_converter_0 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_0");
3584  mp_m_axi_concat_rready = new xsc::xsc_concatenator<3, 3>("m_axi_concat_rready");
3585  mp_m_axi_concat_rready->in_port[0](m_axi_concat_rready_out_0);
3586  mp_m_axi_concat_rready->out_port(m_axi_rready);
3587  mp_m_axi_concat_rready->offset_port(0, 0);
3588  mp_m_axi_rready_converter_0->scalar_in(m_m_axi_rready_converter_0_signal);
3589  mp_m_axi_rready_converter_0->vector_out(m_axi_concat_rready_out_0);
3590  mp_M00_AXI_transactor->RREADY(m_m_axi_rready_converter_0_signal);
3591  mp_M00_AXI_transactor->CLK(aclk);
3592  mp_M00_AXI_transactor->RST(aresetn);
3593  // configure M01_AXI_transactor
3594  xsc::common_cpp::properties M01_AXI_transactor_param_props;
3595  M01_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
3596  M01_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
3597  M01_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
3598  M01_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
3599  M01_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
3600  M01_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
3601  M01_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
3602  M01_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
3603  M01_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
3604  M01_AXI_transactor_param_props.addLong("HAS_BURST", "0");
3605  M01_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
3606  M01_AXI_transactor_param_props.addLong("HAS_PROT", "1");
3607  M01_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
3608  M01_AXI_transactor_param_props.addLong("HAS_QOS", "0");
3609  M01_AXI_transactor_param_props.addLong("HAS_REGION", "0");
3610  M01_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
3611  M01_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
3612  M01_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
3613  M01_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
3614  M01_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
3615  M01_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
3616  M01_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
3617  M01_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
3618  M01_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
3619  M01_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
3620  M01_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
3621  M01_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
3622  M01_AXI_transactor_param_props.addLong("HAS_RESET", "1");
3623  M01_AXI_transactor_param_props.addFloat("PHASE", "0.000");
3624  M01_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
3625  M01_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
3626  M01_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
3627 
3628  mp_M01_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M01_AXI_transactor", M01_AXI_transactor_param_props);
3629  mp_m_axi_awaddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_1");
3630  mp_m_axi_concat_awaddr->in_port[1](m_axi_concat_awaddr_out_1);
3631  mp_m_axi_concat_awaddr->offset_port(1, 32);
3632  mp_m_axi_awaddr_converter_1->vector_in(m_m_axi_awaddr_converter_1_signal);
3633  mp_m_axi_awaddr_converter_1->vector_out(m_axi_concat_awaddr_out_1);
3634  mp_M01_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_1_signal);
3635  mp_m_axi_awprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_1");
3636  mp_m_axi_concat_awprot->in_port[1](m_axi_concat_awprot_out_1);
3637  mp_m_axi_concat_awprot->offset_port(1, 3);
3638  mp_m_axi_awprot_converter_1->vector_in(m_m_axi_awprot_converter_1_signal);
3639  mp_m_axi_awprot_converter_1->vector_out(m_axi_concat_awprot_out_1);
3640  mp_M01_AXI_transactor->AWPROT(m_m_axi_awprot_converter_1_signal);
3641  mp_m_axi_awvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_1");
3642  mp_m_axi_concat_awvalid->in_port[1](m_axi_concat_awvalid_out_1);
3643  mp_m_axi_concat_awvalid->offset_port(1, 1);
3644  mp_m_axi_awvalid_converter_1->scalar_in(m_m_axi_awvalid_converter_1_signal);
3645  mp_m_axi_awvalid_converter_1->vector_out(m_axi_concat_awvalid_out_1);
3646  mp_M01_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_1_signal);
3647  mp_m_axi_awready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_1");
3648 
3649  mp_m_axi_split_awready->out_port[1](m_axi_split_awready_out_1);
3650  mp_m_axi_split_awready->add_mask(1,2,1);
3651  mp_m_axi_awready_converter_1->vector_in(m_axi_split_awready_out_1);
3652  mp_m_axi_awready_converter_1->scalar_out(m_m_axi_awready_converter_1_signal);
3653  mp_M01_AXI_transactor->AWREADY(m_m_axi_awready_converter_1_signal);
3654  mp_m_axi_wdata_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_1");
3655  mp_m_axi_concat_wdata->in_port[1](m_axi_concat_wdata_out_1);
3656  mp_m_axi_concat_wdata->offset_port(1, 32);
3657  mp_m_axi_wdata_converter_1->vector_in(m_m_axi_wdata_converter_1_signal);
3658  mp_m_axi_wdata_converter_1->vector_out(m_axi_concat_wdata_out_1);
3659  mp_M01_AXI_transactor->WDATA(m_m_axi_wdata_converter_1_signal);
3660  mp_m_axi_wstrb_converter_1 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_1");
3661  mp_m_axi_concat_wstrb->in_port[1](m_axi_concat_wstrb_out_1);
3662  mp_m_axi_concat_wstrb->offset_port(1, 4);
3663  mp_m_axi_wstrb_converter_1->vector_in(m_m_axi_wstrb_converter_1_signal);
3664  mp_m_axi_wstrb_converter_1->vector_out(m_axi_concat_wstrb_out_1);
3665  mp_M01_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_1_signal);
3666  mp_m_axi_wvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_1");
3667  mp_m_axi_concat_wvalid->in_port[1](m_axi_concat_wvalid_out_1);
3668  mp_m_axi_concat_wvalid->offset_port(1, 1);
3669  mp_m_axi_wvalid_converter_1->scalar_in(m_m_axi_wvalid_converter_1_signal);
3670  mp_m_axi_wvalid_converter_1->vector_out(m_axi_concat_wvalid_out_1);
3671  mp_M01_AXI_transactor->WVALID(m_m_axi_wvalid_converter_1_signal);
3672  mp_m_axi_wready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_1");
3673 
3674  mp_m_axi_split_wready->out_port[1](m_axi_split_wready_out_1);
3675  mp_m_axi_split_wready->add_mask(1,2,1);
3676  mp_m_axi_wready_converter_1->vector_in(m_axi_split_wready_out_1);
3677  mp_m_axi_wready_converter_1->scalar_out(m_m_axi_wready_converter_1_signal);
3678  mp_M01_AXI_transactor->WREADY(m_m_axi_wready_converter_1_signal);
3679  mp_m_axi_bresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_1");
3680 
3681  mp_m_axi_split_bresp->out_port[1](m_axi_split_bresp_out_1);
3682  mp_m_axi_split_bresp->add_mask(1,4,2);
3683  mp_m_axi_bresp_converter_1->vector_in(m_axi_split_bresp_out_1);
3684  mp_m_axi_bresp_converter_1->vector_out(m_m_axi_bresp_converter_1_signal);
3685  mp_M01_AXI_transactor->BRESP(m_m_axi_bresp_converter_1_signal);
3686  mp_m_axi_bvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_1");
3687 
3688  mp_m_axi_split_bvalid->out_port[1](m_axi_split_bvalid_out_1);
3689  mp_m_axi_split_bvalid->add_mask(1,2,1);
3690  mp_m_axi_bvalid_converter_1->vector_in(m_axi_split_bvalid_out_1);
3691  mp_m_axi_bvalid_converter_1->scalar_out(m_m_axi_bvalid_converter_1_signal);
3692  mp_M01_AXI_transactor->BVALID(m_m_axi_bvalid_converter_1_signal);
3693  mp_m_axi_bready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_1");
3694  mp_m_axi_concat_bready->in_port[1](m_axi_concat_bready_out_1);
3695  mp_m_axi_concat_bready->offset_port(1, 1);
3696  mp_m_axi_bready_converter_1->scalar_in(m_m_axi_bready_converter_1_signal);
3697  mp_m_axi_bready_converter_1->vector_out(m_axi_concat_bready_out_1);
3698  mp_M01_AXI_transactor->BREADY(m_m_axi_bready_converter_1_signal);
3699  mp_m_axi_araddr_converter_1 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_1");
3700  mp_m_axi_concat_araddr->in_port[1](m_axi_concat_araddr_out_1);
3701  mp_m_axi_concat_araddr->offset_port(1, 32);
3702  mp_m_axi_araddr_converter_1->vector_in(m_m_axi_araddr_converter_1_signal);
3703  mp_m_axi_araddr_converter_1->vector_out(m_axi_concat_araddr_out_1);
3704  mp_M01_AXI_transactor->ARADDR(m_m_axi_araddr_converter_1_signal);
3705  mp_m_axi_arprot_converter_1 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_1");
3706  mp_m_axi_concat_arprot->in_port[1](m_axi_concat_arprot_out_1);
3707  mp_m_axi_concat_arprot->offset_port(1, 3);
3708  mp_m_axi_arprot_converter_1->vector_in(m_m_axi_arprot_converter_1_signal);
3709  mp_m_axi_arprot_converter_1->vector_out(m_axi_concat_arprot_out_1);
3710  mp_M01_AXI_transactor->ARPROT(m_m_axi_arprot_converter_1_signal);
3711  mp_m_axi_arvalid_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_1");
3712  mp_m_axi_concat_arvalid->in_port[1](m_axi_concat_arvalid_out_1);
3713  mp_m_axi_concat_arvalid->offset_port(1, 1);
3714  mp_m_axi_arvalid_converter_1->scalar_in(m_m_axi_arvalid_converter_1_signal);
3715  mp_m_axi_arvalid_converter_1->vector_out(m_axi_concat_arvalid_out_1);
3716  mp_M01_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_1_signal);
3717  mp_m_axi_arready_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_1");
3718 
3719  mp_m_axi_split_arready->out_port[1](m_axi_split_arready_out_1);
3720  mp_m_axi_split_arready->add_mask(1,2,1);
3721  mp_m_axi_arready_converter_1->vector_in(m_axi_split_arready_out_1);
3722  mp_m_axi_arready_converter_1->scalar_out(m_m_axi_arready_converter_1_signal);
3723  mp_M01_AXI_transactor->ARREADY(m_m_axi_arready_converter_1_signal);
3724  mp_m_axi_rdata_converter_1 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_1");
3725 
3726  mp_m_axi_split_rdata->out_port[1](m_axi_split_rdata_out_1);
3727  mp_m_axi_split_rdata->add_mask(1,64,32);
3728  mp_m_axi_rdata_converter_1->vector_in(m_axi_split_rdata_out_1);
3729  mp_m_axi_rdata_converter_1->vector_out(m_m_axi_rdata_converter_1_signal);
3730  mp_M01_AXI_transactor->RDATA(m_m_axi_rdata_converter_1_signal);
3731  mp_m_axi_rresp_converter_1 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_1");
3732 
3733  mp_m_axi_split_rresp->out_port[1](m_axi_split_rresp_out_1);
3734  mp_m_axi_split_rresp->add_mask(1,4,2);
3735  mp_m_axi_rresp_converter_1->vector_in(m_axi_split_rresp_out_1);
3736  mp_m_axi_rresp_converter_1->vector_out(m_m_axi_rresp_converter_1_signal);
3737  mp_M01_AXI_transactor->RRESP(m_m_axi_rresp_converter_1_signal);
3738  mp_m_axi_rvalid_converter_1 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_1");
3739 
3740  mp_m_axi_split_rvalid->out_port[1](m_axi_split_rvalid_out_1);
3741  mp_m_axi_split_rvalid->add_mask(1,2,1);
3742  mp_m_axi_rvalid_converter_1->vector_in(m_axi_split_rvalid_out_1);
3743  mp_m_axi_rvalid_converter_1->scalar_out(m_m_axi_rvalid_converter_1_signal);
3744  mp_M01_AXI_transactor->RVALID(m_m_axi_rvalid_converter_1_signal);
3745  mp_m_axi_rready_converter_1 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_1");
3746  mp_m_axi_concat_rready->in_port[1](m_axi_concat_rready_out_1);
3747  mp_m_axi_concat_rready->offset_port(1, 1);
3748  mp_m_axi_rready_converter_1->scalar_in(m_m_axi_rready_converter_1_signal);
3749  mp_m_axi_rready_converter_1->vector_out(m_axi_concat_rready_out_1);
3750  mp_M01_AXI_transactor->RREADY(m_m_axi_rready_converter_1_signal);
3751  mp_M01_AXI_transactor->CLK(aclk);
3752  mp_M01_AXI_transactor->RST(aresetn);
3753  // configure M02_AXI_transactor
3754  xsc::common_cpp::properties M02_AXI_transactor_param_props;
3755  M02_AXI_transactor_param_props.addLong("DATA_WIDTH", "32");
3756  M02_AXI_transactor_param_props.addLong("FREQ_HZ", "125000000");
3757  M02_AXI_transactor_param_props.addLong("ID_WIDTH", "0");
3758  M02_AXI_transactor_param_props.addLong("ADDR_WIDTH", "32");
3759  M02_AXI_transactor_param_props.addLong("AWUSER_WIDTH", "0");
3760  M02_AXI_transactor_param_props.addLong("ARUSER_WIDTH", "0");
3761  M02_AXI_transactor_param_props.addLong("WUSER_WIDTH", "0");
3762  M02_AXI_transactor_param_props.addLong("RUSER_WIDTH", "0");
3763  M02_AXI_transactor_param_props.addLong("BUSER_WIDTH", "0");
3764  M02_AXI_transactor_param_props.addLong("HAS_BURST", "0");
3765  M02_AXI_transactor_param_props.addLong("HAS_LOCK", "0");
3766  M02_AXI_transactor_param_props.addLong("HAS_PROT", "1");
3767  M02_AXI_transactor_param_props.addLong("HAS_CACHE", "0");
3768  M02_AXI_transactor_param_props.addLong("HAS_QOS", "0");
3769  M02_AXI_transactor_param_props.addLong("HAS_REGION", "0");
3770  M02_AXI_transactor_param_props.addLong("HAS_WSTRB", "1");
3771  M02_AXI_transactor_param_props.addLong("HAS_BRESP", "1");
3772  M02_AXI_transactor_param_props.addLong("HAS_RRESP", "1");
3773  M02_AXI_transactor_param_props.addLong("SUPPORTS_NARROW_BURST", "0");
3774  M02_AXI_transactor_param_props.addLong("NUM_READ_OUTSTANDING", "2");
3775  M02_AXI_transactor_param_props.addLong("NUM_WRITE_OUTSTANDING", "2");
3776  M02_AXI_transactor_param_props.addLong("MAX_BURST_LENGTH", "1");
3777  M02_AXI_transactor_param_props.addLong("NUM_READ_THREADS", "1");
3778  M02_AXI_transactor_param_props.addLong("NUM_WRITE_THREADS", "1");
3779  M02_AXI_transactor_param_props.addLong("RUSER_BITS_PER_BYTE", "0");
3780  M02_AXI_transactor_param_props.addLong("WUSER_BITS_PER_BYTE", "0");
3781  M02_AXI_transactor_param_props.addLong("HAS_SIZE", "0");
3782  M02_AXI_transactor_param_props.addLong("HAS_RESET", "1");
3783  M02_AXI_transactor_param_props.addFloat("PHASE", "0.000");
3784  M02_AXI_transactor_param_props.addString("PROTOCOL", "AXI4LITE");
3785  M02_AXI_transactor_param_props.addString("READ_WRITE_MODE", "READ_WRITE");
3786  M02_AXI_transactor_param_props.addString("CLK_DOMAIN", "design_1_processing_system7_0_0_FCLK_CLK0");
3787 
3788  mp_M02_AXI_transactor = new xtlm::xaximm_xtlm2pin_t<32,32,1,1,1,1,1,1>("M02_AXI_transactor", M02_AXI_transactor_param_props);
3789  mp_m_axi_awaddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_awaddr_converter_2");
3790  mp_m_axi_concat_awaddr->in_port[2](m_axi_concat_awaddr_out_2);
3791  mp_m_axi_concat_awaddr->offset_port(2, 64);
3792  mp_m_axi_awaddr_converter_2->vector_in(m_m_axi_awaddr_converter_2_signal);
3793  mp_m_axi_awaddr_converter_2->vector_out(m_axi_concat_awaddr_out_2);
3794  mp_M02_AXI_transactor->AWADDR(m_m_axi_awaddr_converter_2_signal);
3795  mp_m_axi_awprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_awprot_converter_2");
3796  mp_m_axi_concat_awprot->in_port[2](m_axi_concat_awprot_out_2);
3797  mp_m_axi_concat_awprot->offset_port(2, 6);
3798  mp_m_axi_awprot_converter_2->vector_in(m_m_axi_awprot_converter_2_signal);
3799  mp_m_axi_awprot_converter_2->vector_out(m_axi_concat_awprot_out_2);
3800  mp_M02_AXI_transactor->AWPROT(m_m_axi_awprot_converter_2_signal);
3801  mp_m_axi_awvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_awvalid_converter_2");
3802  mp_m_axi_concat_awvalid->in_port[2](m_axi_concat_awvalid_out_2);
3803  mp_m_axi_concat_awvalid->offset_port(2, 2);
3804  mp_m_axi_awvalid_converter_2->scalar_in(m_m_axi_awvalid_converter_2_signal);
3805  mp_m_axi_awvalid_converter_2->vector_out(m_axi_concat_awvalid_out_2);
3806  mp_M02_AXI_transactor->AWVALID(m_m_axi_awvalid_converter_2_signal);
3807  mp_m_axi_awready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_awready_converter_2");
3808 
3809  mp_m_axi_split_awready->out_port[2](m_axi_split_awready_out_2);
3810  mp_m_axi_split_awready->add_mask(2,3,2);
3811  mp_m_axi_awready_converter_2->vector_in(m_axi_split_awready_out_2);
3812  mp_m_axi_awready_converter_2->scalar_out(m_m_axi_awready_converter_2_signal);
3813  mp_M02_AXI_transactor->AWREADY(m_m_axi_awready_converter_2_signal);
3814  mp_m_axi_wdata_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_wdata_converter_2");
3815  mp_m_axi_concat_wdata->in_port[2](m_axi_concat_wdata_out_2);
3816  mp_m_axi_concat_wdata->offset_port(2, 64);
3817  mp_m_axi_wdata_converter_2->vector_in(m_m_axi_wdata_converter_2_signal);
3818  mp_m_axi_wdata_converter_2->vector_out(m_axi_concat_wdata_out_2);
3819  mp_M02_AXI_transactor->WDATA(m_m_axi_wdata_converter_2_signal);
3820  mp_m_axi_wstrb_converter_2 = new xsc::common::vector2vector_converter<4,12>("m_axi_wstrb_converter_2");
3821  mp_m_axi_concat_wstrb->in_port[2](m_axi_concat_wstrb_out_2);
3822  mp_m_axi_concat_wstrb->offset_port(2, 8);
3823  mp_m_axi_wstrb_converter_2->vector_in(m_m_axi_wstrb_converter_2_signal);
3824  mp_m_axi_wstrb_converter_2->vector_out(m_axi_concat_wstrb_out_2);
3825  mp_M02_AXI_transactor->WSTRB(m_m_axi_wstrb_converter_2_signal);
3826  mp_m_axi_wvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_wvalid_converter_2");
3827  mp_m_axi_concat_wvalid->in_port[2](m_axi_concat_wvalid_out_2);
3828  mp_m_axi_concat_wvalid->offset_port(2, 2);
3829  mp_m_axi_wvalid_converter_2->scalar_in(m_m_axi_wvalid_converter_2_signal);
3830  mp_m_axi_wvalid_converter_2->vector_out(m_axi_concat_wvalid_out_2);
3831  mp_M02_AXI_transactor->WVALID(m_m_axi_wvalid_converter_2_signal);
3832  mp_m_axi_wready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_wready_converter_2");
3833 
3834  mp_m_axi_split_wready->out_port[2](m_axi_split_wready_out_2);
3835  mp_m_axi_split_wready->add_mask(2,3,2);
3836  mp_m_axi_wready_converter_2->vector_in(m_axi_split_wready_out_2);
3837  mp_m_axi_wready_converter_2->scalar_out(m_m_axi_wready_converter_2_signal);
3838  mp_M02_AXI_transactor->WREADY(m_m_axi_wready_converter_2_signal);
3839  mp_m_axi_bresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_bresp_converter_2");
3840 
3841  mp_m_axi_split_bresp->out_port[2](m_axi_split_bresp_out_2);
3842  mp_m_axi_split_bresp->add_mask(2,6,4);
3843  mp_m_axi_bresp_converter_2->vector_in(m_axi_split_bresp_out_2);
3844  mp_m_axi_bresp_converter_2->vector_out(m_m_axi_bresp_converter_2_signal);
3845  mp_M02_AXI_transactor->BRESP(m_m_axi_bresp_converter_2_signal);
3846  mp_m_axi_bvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_bvalid_converter_2");
3847 
3848  mp_m_axi_split_bvalid->out_port[2](m_axi_split_bvalid_out_2);
3849  mp_m_axi_split_bvalid->add_mask(2,3,2);
3850  mp_m_axi_bvalid_converter_2->vector_in(m_axi_split_bvalid_out_2);
3851  mp_m_axi_bvalid_converter_2->scalar_out(m_m_axi_bvalid_converter_2_signal);
3852  mp_M02_AXI_transactor->BVALID(m_m_axi_bvalid_converter_2_signal);
3853  mp_m_axi_bready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_bready_converter_2");
3854  mp_m_axi_concat_bready->in_port[2](m_axi_concat_bready_out_2);
3855  mp_m_axi_concat_bready->offset_port(2, 2);
3856  mp_m_axi_bready_converter_2->scalar_in(m_m_axi_bready_converter_2_signal);
3857  mp_m_axi_bready_converter_2->vector_out(m_axi_concat_bready_out_2);
3858  mp_M02_AXI_transactor->BREADY(m_m_axi_bready_converter_2_signal);
3859  mp_m_axi_araddr_converter_2 = new xsc::common::vector2vector_converter<32,96>("m_axi_araddr_converter_2");
3860  mp_m_axi_concat_araddr->in_port[2](m_axi_concat_araddr_out_2);
3861  mp_m_axi_concat_araddr->offset_port(2, 64);
3862  mp_m_axi_araddr_converter_2->vector_in(m_m_axi_araddr_converter_2_signal);
3863  mp_m_axi_araddr_converter_2->vector_out(m_axi_concat_araddr_out_2);
3864  mp_M02_AXI_transactor->ARADDR(m_m_axi_araddr_converter_2_signal);
3865  mp_m_axi_arprot_converter_2 = new xsc::common::vector2vector_converter<3,9>("m_axi_arprot_converter_2");
3866  mp_m_axi_concat_arprot->in_port[2](m_axi_concat_arprot_out_2);
3867  mp_m_axi_concat_arprot->offset_port(2, 6);
3868  mp_m_axi_arprot_converter_2->vector_in(m_m_axi_arprot_converter_2_signal);
3869  mp_m_axi_arprot_converter_2->vector_out(m_axi_concat_arprot_out_2);
3870  mp_M02_AXI_transactor->ARPROT(m_m_axi_arprot_converter_2_signal);
3871  mp_m_axi_arvalid_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_arvalid_converter_2");
3872  mp_m_axi_concat_arvalid->in_port[2](m_axi_concat_arvalid_out_2);
3873  mp_m_axi_concat_arvalid->offset_port(2, 2);
3874  mp_m_axi_arvalid_converter_2->scalar_in(m_m_axi_arvalid_converter_2_signal);
3875  mp_m_axi_arvalid_converter_2->vector_out(m_axi_concat_arvalid_out_2);
3876  mp_M02_AXI_transactor->ARVALID(m_m_axi_arvalid_converter_2_signal);
3877  mp_m_axi_arready_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_arready_converter_2");
3878 
3879  mp_m_axi_split_arready->out_port[2](m_axi_split_arready_out_2);
3880  mp_m_axi_split_arready->add_mask(2,3,2);
3881  mp_m_axi_arready_converter_2->vector_in(m_axi_split_arready_out_2);
3882  mp_m_axi_arready_converter_2->scalar_out(m_m_axi_arready_converter_2_signal);
3883  mp_M02_AXI_transactor->ARREADY(m_m_axi_arready_converter_2_signal);
3884  mp_m_axi_rdata_converter_2 = new xsc::common::vector2vector_converter<96,32>("m_axi_rdata_converter_2");
3885 
3886  mp_m_axi_split_rdata->out_port[2](m_axi_split_rdata_out_2);
3887  mp_m_axi_split_rdata->add_mask(2,96,64);
3888  mp_m_axi_rdata_converter_2->vector_in(m_axi_split_rdata_out_2);
3889  mp_m_axi_rdata_converter_2->vector_out(m_m_axi_rdata_converter_2_signal);
3890  mp_M02_AXI_transactor->RDATA(m_m_axi_rdata_converter_2_signal);
3891  mp_m_axi_rresp_converter_2 = new xsc::common::vector2vector_converter<6,2>("m_axi_rresp_converter_2");
3892 
3893  mp_m_axi_split_rresp->out_port[2](m_axi_split_rresp_out_2);
3894  mp_m_axi_split_rresp->add_mask(2,6,4);
3895  mp_m_axi_rresp_converter_2->vector_in(m_axi_split_rresp_out_2);
3896  mp_m_axi_rresp_converter_2->vector_out(m_m_axi_rresp_converter_2_signal);
3897  mp_M02_AXI_transactor->RRESP(m_m_axi_rresp_converter_2_signal);
3898  mp_m_axi_rvalid_converter_2 = new xsc::common::vectorN2scalar_converter<3>("m_axi_rvalid_converter_2");
3899 
3900  mp_m_axi_split_rvalid->out_port[2](m_axi_split_rvalid_out_2);
3901  mp_m_axi_split_rvalid->add_mask(2,3,2);
3902  mp_m_axi_rvalid_converter_2->vector_in(m_axi_split_rvalid_out_2);
3903  mp_m_axi_rvalid_converter_2->scalar_out(m_m_axi_rvalid_converter_2_signal);
3904  mp_M02_AXI_transactor->RVALID(m_m_axi_rvalid_converter_2_signal);
3905  mp_m_axi_rready_converter_2 = new xsc::common::scalar2vectorN_converter<3>("m_axi_rready_converter_2");
3906  mp_m_axi_concat_rready->in_port[2](m_axi_concat_rready_out_2);
3907  mp_m_axi_concat_rready->offset_port(2, 2);
3908  mp_m_axi_rready_converter_2->scalar_in(m_m_axi_rready_converter_2_signal);
3909  mp_m_axi_rready_converter_2->vector_out(m_axi_concat_rready_out_2);
3910  mp_M02_AXI_transactor->RREADY(m_m_axi_rready_converter_2_signal);
3911  mp_M02_AXI_transactor->CLK(aclk);
3912  mp_M02_AXI_transactor->RST(aresetn);
3913 
3914  // initialize transactors stubs
3915  S00_AXI_transactor_target_wr_socket_stub = nullptr;
3916  S00_AXI_transactor_target_rd_socket_stub = nullptr;
3917  M00_AXI_transactor_initiator_wr_socket_stub = nullptr;
3918  M00_AXI_transactor_initiator_rd_socket_stub = nullptr;
3919  M01_AXI_transactor_initiator_wr_socket_stub = nullptr;
3920  M01_AXI_transactor_initiator_rd_socket_stub = nullptr;
3921  M02_AXI_transactor_initiator_wr_socket_stub = nullptr;
3922  M02_AXI_transactor_initiator_rd_socket_stub = nullptr;
3923 
3924 }
3925 
3926 void design_1_xbar_0::before_end_of_elaboration()
3927 {
3928  // configure 'S00_AXI' transactor
3929  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "S00_AXI_TLM_MODE") != 1)
3930  {
3931  mp_impl->target_0_rd_socket->bind(*(mp_S00_AXI_transactor->rd_socket));
3932  mp_impl->target_0_wr_socket->bind(*(mp_S00_AXI_transactor->wr_socket));
3933 
3934  }
3935  else
3936  {
3937  S00_AXI_transactor_target_wr_socket_stub = new xtlm::xtlm_aximm_target_stub("wr_socket",0);
3938  S00_AXI_transactor_target_wr_socket_stub->bind(*(mp_S00_AXI_transactor->wr_socket));
3939  S00_AXI_transactor_target_rd_socket_stub = new xtlm::xtlm_aximm_target_stub("rd_socket",0);
3940  S00_AXI_transactor_target_rd_socket_stub->bind(*(mp_S00_AXI_transactor->rd_socket));
3941  mp_S00_AXI_transactor->disable_transactor();
3942  }
3943 
3944  // configure 'M00_AXI' transactor
3945  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M00_AXI_TLM_MODE") != 1)
3946  {
3947  mp_impl->initiator_0_rd_socket->bind(*(mp_M00_AXI_transactor->rd_socket));
3948  mp_impl->initiator_0_wr_socket->bind(*(mp_M00_AXI_transactor->wr_socket));
3949 
3950  }
3951  else
3952  {
3953  M00_AXI_transactor_initiator_wr_socket_stub = new xtlm::xtlm_aximm_initiator_stub("wr_socket",0);
3954  M00_AXI_transactor_initiator_wr_socket_stub->bind(*(mp_M00_AXI_transactor->wr_socket));
3955  M00_AXI_transactor_initiator_rd_socket_stub = new xtlm::xtlm_aximm_initiator_stub("rd_socket",0);
3956  M00_AXI_transactor_initiator_rd_socket_stub->bind(*(mp_M00_AXI_transactor->rd_socket));
3957  mp_M00_AXI_transactor->disable_transactor();
3958  }
3959 
3960  // configure 'M01_AXI' transactor
3961  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M01_AXI_TLM_MODE") != 1)
3962  {
3963  mp_impl->initiator_1_rd_socket->bind(*(mp_M01_AXI_transactor->rd_socket));
3964  mp_impl->initiator_1_wr_socket->bind(*(mp_M01_AXI_transactor->wr_socket));
3965 
3966  }
3967  else
3968  {
3969  M01_AXI_transactor_initiator_wr_socket_stub = new xtlm::xtlm_aximm_initiator_stub("wr_socket",0);
3970  M01_AXI_transactor_initiator_wr_socket_stub->bind(*(mp_M01_AXI_transactor->wr_socket));
3971  M01_AXI_transactor_initiator_rd_socket_stub = new xtlm::xtlm_aximm_initiator_stub("rd_socket",0);
3972  M01_AXI_transactor_initiator_rd_socket_stub->bind(*(mp_M01_AXI_transactor->rd_socket));
3973  mp_M01_AXI_transactor->disable_transactor();
3974  }
3975 
3976  // configure 'M02_AXI' transactor
3977  if (xsc::utils::xsc_sim_manager::getInstanceParameterInt("design_1_xbar_0", "M02_AXI_TLM_MODE") != 1)
3978  {
3979  mp_impl->initiator_2_rd_socket->bind(*(mp_M02_AXI_transactor->rd_socket));
3980  mp_impl->initiator_2_wr_socket->bind(*(mp_M02_AXI_transactor->wr_socket));
3981 
3982  }
3983  else
3984  {
3985  M02_AXI_transactor_initiator_wr_socket_stub = new xtlm::xtlm_aximm_initiator_stub("wr_socket",0);
3986  M02_AXI_transactor_initiator_wr_socket_stub->bind(*(mp_M02_AXI_transactor->wr_socket));
3987  M02_AXI_transactor_initiator_rd_socket_stub = new xtlm::xtlm_aximm_initiator_stub("rd_socket",0);
3988  M02_AXI_transactor_initiator_rd_socket_stub->bind(*(mp_M02_AXI_transactor->rd_socket));
3989  mp_M02_AXI_transactor->disable_transactor();
3990  }
3991 
3992 }
3993 
3994 #endif // MTI_SYSTEMC
3995 
3996 
3997 
3998 
3999 design_1_xbar_0::~design_1_xbar_0()
4000 {
4001  delete mp_S00_AXI_transactor;
4002  delete mp_s_axi_awvalid_converter;
4003  delete mp_s_axi_awready_converter;
4004  delete mp_s_axi_wvalid_converter;
4005  delete mp_s_axi_wready_converter;
4006  delete mp_s_axi_bvalid_converter;
4007  delete mp_s_axi_bready_converter;
4008  delete mp_s_axi_arvalid_converter;
4009  delete mp_s_axi_arready_converter;
4010  delete mp_s_axi_rvalid_converter;
4011  delete mp_s_axi_rready_converter;
4012 
4013  delete mp_M00_AXI_transactor;
4014  delete mp_m_axi_awaddr_converter_0;
4015  delete mp_m_axi_awprot_converter_0;
4016  delete mp_m_axi_awvalid_converter_0;
4017  delete mp_m_axi_awready_converter_0;
4018  delete mp_m_axi_wdata_converter_0;
4019  delete mp_m_axi_wstrb_converter_0;
4020  delete mp_m_axi_wvalid_converter_0;
4021  delete mp_m_axi_wready_converter_0;
4022  delete mp_m_axi_bresp_converter_0;
4023  delete mp_m_axi_bvalid_converter_0;
4024  delete mp_m_axi_bready_converter_0;
4025  delete mp_m_axi_araddr_converter_0;
4026  delete mp_m_axi_arprot_converter_0;
4027  delete mp_m_axi_arvalid_converter_0;
4028  delete mp_m_axi_arready_converter_0;
4029  delete mp_m_axi_rdata_converter_0;
4030  delete mp_m_axi_rresp_converter_0;
4031  delete mp_m_axi_rvalid_converter_0;
4032  delete mp_m_axi_rready_converter_0;
4033 
4034  delete mp_M01_AXI_transactor;
4035  delete mp_m_axi_awaddr_converter_1;
4036  delete mp_m_axi_awprot_converter_1;
4037  delete mp_m_axi_awvalid_converter_1;
4038  delete mp_m_axi_awready_converter_1;
4039  delete mp_m_axi_wdata_converter_1;
4040  delete mp_m_axi_wstrb_converter_1;
4041  delete mp_m_axi_wvalid_converter_1;
4042  delete mp_m_axi_wready_converter_1;
4043  delete mp_m_axi_bresp_converter_1;
4044  delete mp_m_axi_bvalid_converter_1;
4045  delete mp_m_axi_bready_converter_1;
4046  delete mp_m_axi_araddr_converter_1;
4047  delete mp_m_axi_arprot_converter_1;
4048  delete mp_m_axi_arvalid_converter_1;
4049  delete mp_m_axi_arready_converter_1;
4050  delete mp_m_axi_rdata_converter_1;
4051  delete mp_m_axi_rresp_converter_1;
4052  delete mp_m_axi_rvalid_converter_1;
4053  delete mp_m_axi_rready_converter_1;
4054 
4055  delete mp_M02_AXI_transactor;
4056  delete mp_m_axi_awaddr_converter_2;
4057  delete mp_m_axi_awprot_converter_2;
4058  delete mp_m_axi_awvalid_converter_2;
4059  delete mp_m_axi_awready_converter_2;
4060  delete mp_m_axi_wdata_converter_2;
4061  delete mp_m_axi_wstrb_converter_2;
4062  delete mp_m_axi_wvalid_converter_2;
4063  delete mp_m_axi_wready_converter_2;
4064  delete mp_m_axi_bresp_converter_2;
4065  delete mp_m_axi_bvalid_converter_2;
4066  delete mp_m_axi_bready_converter_2;
4067  delete mp_m_axi_araddr_converter_2;
4068  delete mp_m_axi_arprot_converter_2;
4069  delete mp_m_axi_arvalid_converter_2;
4070  delete mp_m_axi_arready_converter_2;
4071  delete mp_m_axi_rdata_converter_2;
4072  delete mp_m_axi_rresp_converter_2;
4073  delete mp_m_axi_rvalid_converter_2;
4074  delete mp_m_axi_rready_converter_2;
4075 
4076  delete mp_m_axi_concat_araddr;
4077  delete mp_m_axi_concat_arprot;
4078  delete mp_m_axi_concat_arvalid;
4079  delete mp_m_axi_concat_awaddr;
4080  delete mp_m_axi_concat_awprot;
4081  delete mp_m_axi_concat_awvalid;
4082  delete mp_m_axi_concat_bready;
4083  delete mp_m_axi_concat_rready;
4084  delete mp_m_axi_concat_wdata;
4085  delete mp_m_axi_concat_wstrb;
4086  delete mp_m_axi_concat_wvalid;
4087  delete mp_m_axi_split_arready;
4088  delete mp_m_axi_split_awready;
4089  delete mp_m_axi_split_bresp;
4090  delete mp_m_axi_split_bvalid;
4091  delete mp_m_axi_split_rdata;
4092  delete mp_m_axi_split_rresp;
4093  delete mp_m_axi_split_rvalid;
4094  delete mp_m_axi_split_wready;
4095 }
4096 
4097 #ifdef MTI_SYSTEMC
4098 SC_MODULE_EXPORT(design_1_xbar_0);
4099 #endif
4100 
4101 #ifdef XM_SYSTEMC
4102 XMSC_MODULE_EXPORT(design_1_xbar_0);
4103 #endif
4104 
4105 #ifdef RIVIERA
4106 SC_MODULE_EXPORT(design_1_xbar_0);
4107 SC_REGISTER_BV(96);
4108 #endif
4109 
s_axi_awready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire s_axi_awready
Definition: axi_vip_v1_1_vl_rfs.sv:109
s_axi_bready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire s_axi_bready
Definition: axi_vip_v1_1_vl_rfs.sv:125
design_1_xbar_0_sc
Definition: design_1_xbar_0_sc.h:70
m_axi_wdata
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > m_axi_wdata
Definition: axi_vip_v1_1_vl_rfs.sv:168
m_axi_wvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire m_axi_wvalid
Definition: axi_vip_v1_1_vl_rfs.sv:172
m_axi_bvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire m_axi_bvalid
Definition: axi_vip_v1_1_vl_rfs.sv:179
design_1_processing_system7_0_0_sc::mp_impl
processing_system7_v5_5_tlm * mp_impl
Definition: design_1_processing_system7_0_0_sc.h:89
s_axi_rvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire s_axi_rvalid
Definition: axi_vip_v1_1_vl_rfs.sv:148
design_1_xbar_0.h
m_axi_arready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > output wire input wire m_axi_arready
Definition: axi_vip_v1_1_vl_rfs.sv:195
m_axi_rvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_RDATA_WIDTH-1:0 > input wire< 2-1:0 > input wire input wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > input wire m_axi_rvalid
Definition: axi_vip_v1_1_vl_rfs.sv:203
s_axi_rready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire s_axi_rready
Definition: axi_vip_v1_1_vl_rfs.sv:149
s_axi_arvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire s_axi_arvalid
Definition: axi_vip_v1_1_vl_rfs.sv:139
s_axi_rresp
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > s_axi_rresp
Definition: axi_vip_v1_1_vl_rfs.sv:145
s_axi_bresp
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > s_axi_bresp
Definition: axi_vip_v1_1_vl_rfs.sv:122
s_axi_awprot
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > s_axi_awprot
Definition: axi_vip_v1_1_vl_rfs.sv:104
s_axi_arready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire s_axi_arready
Definition: axi_vip_v1_1_vl_rfs.sv:140
s_axi_wdata
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > s_axi_wdata
Definition: axi_vip_v1_1_vl_rfs.sv:113
m_axi_rready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_RDATA_WIDTH-1:0 > input wire< 2-1:0 > input wire input wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > input wire output wire m_axi_rready
Definition: axi_vip_v1_1_vl_rfs.sv:205
m_axi_awaddr
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > m_axi_awaddr
Definition: axi_vip_v1_1_vl_rfs.sv:153
s_axi_araddr
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > s_axi_araddr
Definition: axi_vip_v1_1_vl_rfs.sv:129
s_axi_awaddr
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > s_axi_awaddr
Definition: axi_vip_v1_1_vl_rfs.sv:98
m_axi_rresp
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_RDATA_WIDTH-1:0 > input wire< 2-1:0 > m_axi_rresp
Definition: axi_vip_v1_1_vl_rfs.sv:200
m_axi_arvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > output wire m_axi_arvalid
Definition: axi_vip_v1_1_vl_rfs.sv:194
s_axi_wstrb
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > s_axi_wstrb
Definition: axi_vip_v1_1_vl_rfs.sv:114
aresetn
DowngradeIPIdentifiedWarnings module input wire input wire aresetn
Definition: axi_vip_v1_1_vl_rfs.sv:94
design_1_xbar_0_sc.h
s_axi_awvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire s_axi_awvalid
Definition: axi_vip_v1_1_vl_rfs.sv:108
s_axi_wready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire s_axi_wready
Definition: axi_vip_v1_1_vl_rfs.sv:118
m_axi_bresp
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > m_axi_bresp
Definition: axi_vip_v1_1_vl_rfs.sv:177
m_axi_rdata
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_RDATA_WIDTH-1:0 > m_axi_rdata
Definition: axi_vip_v1_1_vl_rfs.sv:199
m_axi_araddr
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > m_axi_araddr
Definition: axi_vip_v1_1_vl_rfs.sv:184
m_axi_awvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire m_axi_awvalid
Definition: axi_vip_v1_1_vl_rfs.sv:163
m_axi_bready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire m_axi_bready
Definition: axi_vip_v1_1_vl_rfs.sv:180
s_axi_wvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire s_axi_wvalid
Definition: axi_vip_v1_1_vl_rfs.sv:117
m_axi_wready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire m_axi_wready
Definition: axi_vip_v1_1_vl_rfs.sv:173
axi_crossbar.h
m_axi_awready
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire m_axi_awready
Definition: axi_vip_v1_1_vl_rfs.sv:164
m_axi_awprot
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > m_axi_awprot
Definition: axi_vip_v1_1_vl_rfs.sv:159
m_axi_arprot
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > output wire output wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< 2-1:0 > input wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > m_axi_arprot
Definition: axi_vip_v1_1_vl_rfs.sv:190
s_axi_rdata
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > s_axi_rdata
Definition: axi_vip_v1_1_vl_rfs.sv:144
m_axi_wstrb
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_ARUSER_WIDTH==0?0:C_AXI_ARUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > output wire< C_AXI_RDATA_WIDTH-1:0 > output wire< 2-1:0 > output wire output wire< C_AXI_RUSER_WIDTH==0?0:C_AXI_RUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_ADDR_WIDTH-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > output wire< 3-1:0 > output wire< 2-1:0 > output wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > output wire< 4-1:0 > output wire< 3-1:0 > output wire< 4-1:0 > output wire< 4-1:0 > output wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > output wire input wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH-1:0 > output wire< C_AXI_WDATA_WIDTH/8==0?0:C_AXI_WDATA_WIDTH/8-1:0 > m_axi_wstrb
Definition: axi_vip_v1_1_vl_rfs.sv:169
s_axi_arprot
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire input wire input wire< C_AXI_RID_WIDTH==0?0:C_AXI_RID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > s_axi_arprot
Definition: axi_vip_v1_1_vl_rfs.sv:135
s_axi_bvalid
DowngradeIPIdentifiedWarnings module input wire input wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_ADDR_WIDTH-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 4 :8) -1:0 > input wire< 3-1:0 > input wire< 2-1:0 > input wire<((C_AXI_PROTOCOL==1) ? 2 :1) -1:0 > input wire< 4-1:0 > input wire< 3-1:0 > input wire< 4-1:0 > input wire< 4-1:0 > input wire< C_AXI_AWUSER_WIDTH==0?0:C_AXI_AWUSER_WIDTH-1:0 > input wire output wire input wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH-1:0 > input wire< C_AXI_WDATA_WIDTH/8==0 ?0:C_AXI_WDATA_WIDTH/8-1:0 > input wire input wire< C_AXI_WUSER_WIDTH==0?0:C_AXI_WUSER_WIDTH-1:0 > input wire output wire output wire< C_AXI_WID_WIDTH==0?0:C_AXI_WID_WIDTH-1:0 > output wire< 2-1:0 > output wire< C_AXI_BUSER_WIDTH==0?0:C_AXI_BUSER_WIDTH-1:0 > output wire s_axi_bvalid
Definition: axi_vip_v1_1_vl_rfs.sv:124