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SimpleVOut
1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
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#include <axi_protocol_converter.h>
Public Member Functions | |
axi_protocol_converter (sc_core::sc_module_name module_name, xsc::common_cpp::properties &) | |
virtual | ~axi_protocol_converter () |
SC_HAS_PROCESS (axi_protocol_converter) | |
axi_protocol_converter (sc_core::sc_module_name module_name, xsc::common_cpp::properties &) | |
virtual | ~axi_protocol_converter () |
SC_HAS_PROCESS (axi_protocol_converter) | |
Public Attributes | |
xtlm::xtlm_aximm_target_socket * | target_rd_socket |
xtlm::xtlm_aximm_target_socket * | target_wr_socket |
xtlm::xtlm_aximm_initiator_socket * | initiator_rd_socket |
xtlm::xtlm_aximm_initiator_socket * | initiator_wr_socket |
sc_in< bool > | aclk |
sc_in< bool > | aresetn |
Private Attributes | |
xtlm::xtlm_aximm_passthru_module * | P1 |
xtlm::xtlm_aximm_passthru_module * | P2 |
Definition at line 7 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
axi_protocol_converter::axi_protocol_converter | ( | sc_core::sc_module_name | module_name, |
xsc::common_cpp::properties & | |||
) |
Definition at line 4 of file design_1_auto_pc_0/src/axi_protocol_converter.cpp.
References initiator_rd_socket, initiator_wr_socket, P1, P2, target_rd_socket, and target_wr_socket.
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virtual |
Definition at line 18 of file design_1_auto_pc_0/src/axi_protocol_converter.cpp.
References initiator_rd_socket, initiator_wr_socket, P1, P2, target_rd_socket, and target_wr_socket.
axi_protocol_converter::axi_protocol_converter | ( | sc_core::sc_module_name | module_name, |
xsc::common_cpp::properties & | |||
) |
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virtual |
axi_protocol_converter::SC_HAS_PROCESS | ( | axi_protocol_converter | ) |
axi_protocol_converter::SC_HAS_PROCESS | ( | axi_protocol_converter | ) |
sc_in< bool > axi_protocol_converter::aclk |
Definition at line 16 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
sc_in< bool > axi_protocol_converter::aresetn |
Definition at line 17 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
xtlm::xtlm_aximm_initiator_socket * axi_protocol_converter::initiator_rd_socket |
Definition at line 14 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
Referenced by axi_protocol_converter(), design_1_auto_pc_0_sc::design_1_auto_pc_0_sc(), design_1_auto_pc_1_sc::design_1_auto_pc_1_sc(), and ~axi_protocol_converter().
xtlm::xtlm_aximm_initiator_socket * axi_protocol_converter::initiator_wr_socket |
Definition at line 15 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
Referenced by axi_protocol_converter(), design_1_auto_pc_0_sc::design_1_auto_pc_0_sc(), design_1_auto_pc_1_sc::design_1_auto_pc_1_sc(), and ~axi_protocol_converter().
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private |
Definition at line 19 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
Referenced by axi_protocol_converter(), and ~axi_protocol_converter().
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private |
Definition at line 20 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
Referenced by axi_protocol_converter(), and ~axi_protocol_converter().
xtlm::xtlm_aximm_target_socket * axi_protocol_converter::target_rd_socket |
Definition at line 12 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
Referenced by axi_protocol_converter(), design_1_auto_pc_0_sc::design_1_auto_pc_0_sc(), design_1_auto_pc_1_sc::design_1_auto_pc_1_sc(), and ~axi_protocol_converter().
xtlm::xtlm_aximm_target_socket * axi_protocol_converter::target_wr_socket |
Definition at line 13 of file design_1_auto_pc_0/src/axi_protocol_converter.h.
Referenced by axi_protocol_converter(), design_1_auto_pc_0_sc::design_1_auto_pc_0_sc(), design_1_auto_pc_1_sc::design_1_auto_pc_1_sc(), and ~axi_protocol_converter().