vt52-fpga  1.0.0 Initial
vt52-fpga is a serial terminal implemented on a FPGA
cursor.v
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1 /**
2  * Cursor (position and blinking)
3  */
4 module cursor
5  #(parameter ROW_BITS = 5,
6  parameter COL_BITS = 7)
7  (input clk,
8  input reset,
9  input tick,
10  output wire [COL_BITS-1:0] x,
11  output wire [ROW_BITS-1:0] y,
12  output wire blink_on,
13  input [COL_BITS-1:0] new_x,
14  input [ROW_BITS-1:0] new_y,
15  input wen
16  );
17 
19  .reset(reset),
20  .tick(tick),
21  .reset_count(wen),
22  .blink_on(blink_on)
23  );
24 
25  simple_register #(.SIZE(COL_BITS))
26  cursor_x_reg(.clk(clk),
27  .reset(reset),
28  .idata(new_x),
29  .wen(wen),
30  .odata(x)
31  );
32 
33  simple_register #(.SIZE(ROW_BITS))
34  cursor_y_reg(.clk(clk),
35  .reset(reset),
36  .idata(new_y),
37  .wen(wen),
38  .odata(y)
39  );
40 endmodule
module simple_register(input wire clk, input wire reset, input wire< SIZE-1:0 > idata, input wire wen, output reg< SIZE-1:0 > odata)
Basic register with synchronous set & reset.
module cursor(input clk, input reset, input tick, output wire< COL_BITS-1:0 > x, output wire< ROW_BITS-1:0 > y, output wire blink_on, input[COL_BITS-1:0] new_x, input[ROW_BITS-1:0] new_y, input wen)
Cursor (position and blinking)
Definition: cursor.v:7
module cursor_blinker(input clk, input reset, input tick, input reset_count, output wire blink_on)
Cursor blinker (uses vblank as tick, blinks about once a second)
Definition: cursor_blinker.v:5