 |
SimpleVOut
1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
|
|
SimpleVOut
1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
|
Files | |
| file | design_1_clk_wiz_0.xdc [code] |
| file | design_1_clk_wiz_0_board.xdc [code] |
| file | design_1_clk_wiz_0_ooc.xdc [code] |
1.8.17