SimpleVOut
1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
design_1_framebuffer_0 Directory Reference
Files
file
Demos/myproj/project_1.gen/sources_1/bd/design_1/ip/design_1_framebuffer_0/simplehdmi.xdc
[code]
Demos
myproj
project_1.gen
sources_1
bd
design_1
ip
design_1_framebuffer_0
Generated on Wed Jul 21 2021 08:53:25 for SimpleVOut by
1.8.17