SimpleVOut  1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
design_1_xlconstant_0_0_stub.sv
Go to the documentation of this file.
1 // (c) Copyright 1995-2019 Xilinx, Inc. All rights reserved.
2 //
3 // This file contains confidential and proprietary information
4 // of Xilinx, Inc. and is protected under U.S. and
5 // international copyright and other intellectual property
6 // laws.
7 //
8 // DISCLAIMER
9 // This disclaimer is not a license and does not grant any
10 // rights to the materials distributed herewith. Except as
11 // otherwise provided in a valid license issued to you by
12 // Xilinx, and to the maximum extent permitted by applicable
13 // law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
14 // WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
15 // AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
16 // BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
17 // INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
18 // (2) Xilinx shall not be liable (whether in contract or tort,
19 // including negligence, or under any other theory of
20 // liability) for any loss or damage of any kind or nature
21 // related to, arising under or in connection with these
22 // materials, including for any direct, or any indirect,
23 // special, incidental, or consequential loss or damage
24 // (including loss of data, profits, goodwill, or any type of
25 // loss or damage suffered as a result of any action brought
26 // by a third party) even if such damage or loss was
27 // reasonably foreseeable or Xilinx had been advised of the
28 // possibility of the same.
29 //
30 // CRITICAL APPLICATIONS
31 // Xilinx products are not designed or intended to be fail-
32 // safe, or for use in any application requiring fail-safe
33 // performance, such as life-support or safety devices or
34 // systems, Class III medical devices, nuclear facilities,
35 // applications related to the deployment of airbags, or any
36 // other applications that could lead to death, personal
37 // injury, or severe property or environmental damage
38 // (individually and collectively, "Critical
39 // Applications"). Customer assumes the sole risk and
40 // liability of any use of Xilinx products in Critical
41 // Applications, subject only to applicable laws and
42 // regulations governing limitations on product liability.
43 //
44 // THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
45 // PART OF THIS FILE AT ALL TIMES.
46 //
47 // DO NOT MODIFY THIS FILE.
48 
49 //------------------------------------------------------------------------------------
50 // Filename: xl_Constant_stub.sv
51 // Description: This HDL file is intended to be used with following simulators only:
52 //
53 // Vivado Simulator (XSim)
54 // Cadence Xcelium Simulator
55 // Aldec Riviera-PRO Simulator
56 //
57 //------------------------------------------------------------------------------------
58 `ifdef XILINX_SIMULATOR
59 `ifndef XILINX_SIMULATOR_BITASBOOL
60 `define XILINX_SIMULATOR_BITASBOOL
61 typedef bit bit_as_bool;
62 `endif
63 
64 (* SC_MODULE_EXPORT *)
66  output bit [3 : 0 ] dout
67 );
68 endmodule
69 `endif
70 
71 `ifdef XCELIUM
72 (* XMSC_MODULE_EXPORT *)
73 module design_1_xlconstant_0_0 (dout)
74 (* integer foreign = "SystemC";
75 *);
76  output wire [3 : 0 ] dout;
77 endmodule
78 `endif
79 
80 `ifdef RIVIERA
81 (* SC_MODULE_EXPORT *)
82 module design_1_xlconstant_0_0 (dout)
83  output wire [3 : 0 ] dout;
84 endmodule
85 `endif
86 
design_1_xlconstant_0_0
Definition: design_1_xlconstant_0_0.h:58