SimpleVOut  1.0.0 Initial
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
b_transport_converter.h
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46 
47 #ifndef _B_TRANSPORT_CONVERTER_H_
48 #define _B_TRANSPORT_CONVERTER_H_
49 
50 #include <systemc>
51 #include "tlm_utils/simple_target_socket.h"
52 #include "tlm_utils/simple_initiator_socket.h"
53 #include <utility>
54 #include <vector>
55 
56 template<int IN_WIDTH, int OUT_WIDTH>
57 class b_transport_converter: public sc_core::sc_module
58 {
60  {
66  };
67  typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
68 
69  public:
71  b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
72  sc_module(name)
73  {
74  target_socket.register_b_transport(
76  initiator_socket.register_nb_transport_bw(
78 
79  }
80 
81  //simple tlm target/initiator socket...
82  tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
83  tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
84 
85 
86  public:
87  void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
88  {
89  tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
90  switch(get_tlm_if_type(payload.get_address()))
91  {
92  case B_TRANSPORT:
93  initiator_socket->b_transport(payload, time);
94  break;
95 
96  case NB_TRANSPORT:
97  initiator_socket->nb_transport_fw(payload, phase, time);
98  wait(resp_complete_event); //! Wait for the response to complete
99  break;
100 
101  case TRANSPORT_DBG:
102  initiator_socket->transport_dbg(payload);
103  break;
104 
105  case DMI_IF:
106  break;
107 
108  default:
109  SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
110  }
111  }
112 
113  tlm::tlm_sync_enum
114  nb_transport_bw(tlm::tlm_generic_payload& payload,
115  tlm::tlm_phase& phase, sc_core::sc_time& time)
116  {
117  if(phase == tlm::BEGIN_RESP) {
118  resp_complete_event.notify();
119  phase = tlm::END_RESP;
120  return tlm::TLM_UPDATED;
121  }
122  return tlm::TLM_ACCEPTED;
123  }
124 
125  private:
126  TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
127  {
128  //check for b_transport addresses
129  for(auto& addr_range: m_b_transport_addr_list) {
130  if(address >= addr_range.first && address < addr_range.second) {
131  return B_TRANSPORT;
132  }
133  }
134 
135  //check for nb_transport addresses
136  for(auto& addr_range: m_nb_transport_addr_list) {
137  if(address >= addr_range.first && address < addr_range.second) {
138  return NB_TRANSPORT;
139  }
140  }
141  //check for dbg_transport addresses
142  for(auto& addr_range: m_dbg_transport_addr_list) {
143  if(address >= addr_range.first && address < addr_range.second) {
144  return TRANSPORT_DBG;
145  }
146  }
147 
148  //By default return NB_TRANSPORT
149  return NB_TRANSPORT;
150  }
151 
152  //Start and End Address List for each of interfaces...
156 
157  //event to notify completion of transaction
158  sc_core::sc_event resp_complete_event;
159 };
160 
161 template<int IN_WIDTH, int OUT_WIDTH>
163 template<int IN_WIDTH, int OUT_WIDTH>
165 template<int IN_WIDTH, int OUT_WIDTH>
167 
168 
169 #endif /* _B_TRANSPORT_CONVERTER_H_ */
170 
b_transport_converter::nb_transport_bw
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &time)
Definition: b_transport_converter.h:114
b_transport_converter::addr_range_list
std::vector< std::pair< sc_dt::uint64, sc_dt::uint64 > > addr_range_list
Definition: b_transport_converter.h:67
b_transport_converter::get_tlm_if_type
TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
Definition: b_transport_converter.h:126
b_transport_converter::TLM_IF_TYPE
TLM_IF_TYPE
Definition: b_transport_converter.h:59
b_transport_converter::m_b_transport_addr_list
static addr_range_list m_b_transport_addr_list
Definition: b_transport_converter.h:153
b_transport_converter::B_TRANSPORT
@ B_TRANSPORT
Definition: b_transport_converter.h:61
b_transport_converter
Definition: b_transport_converter.h:57
b_transport_converter::DMI_IF
@ DMI_IF
Definition: b_transport_converter.h:64
b_transport_converter::NB_TRANSPORT
@ NB_TRANSPORT
Definition: b_transport_converter.h:62
b_transport_converter::INVALID_IF
@ INVALID_IF
Definition: b_transport_converter.h:65
b_transport_converter::TRANSPORT_DBG
@ TRANSPORT_DBG
Definition: b_transport_converter.h:63
b_transport_converter::initiator_socket
tlm_utils::simple_initiator_socket< b_transport_converter< IN_WIDTH, OUT_WIDTH >, OUT_WIDTH > initiator_socket
Definition: b_transport_converter.h:83
b_transport_converter::m_dbg_transport_addr_list
static addr_range_list m_dbg_transport_addr_list
Definition: b_transport_converter.h:155
b_transport_converter::SC_HAS_PROCESS
SC_HAS_PROCESS(b_transport_converter)
b_transport_converter::b_transport
void b_transport(tlm::tlm_generic_payload &payload, sc_core::sc_time &time)
Definition: b_transport_converter.h:87
b_transport_converter::resp_complete_event
sc_core::sc_event resp_complete_event
Definition: b_transport_converter.h:158
b_transport_converter::m_nb_transport_addr_list
static addr_range_list m_nb_transport_addr_list
Definition: b_transport_converter.h:154
b_transport_converter::target_socket
tlm_utils::simple_target_socket< b_transport_converter< IN_WIDTH, OUT_WIDTH >, IN_WIDTH > target_socket
Definition: b_transport_converter.h:82